FinFET Doping Uniformity via Segmented Ion Implantation

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Solution Overview

Problem

The challenge in semiconductor manufacturing is the difficulty in controlling the concentration of doping ions in FinFETs, particularly due to the complexity of ion implantation processes on the three-dimensional structure of FinFETs, which affects the uniformity and performance of the semiconductor device.

Innovation Solution

A method is developed to form fins on a substrate with a sacrificial layer on top, allowing for a first ion implantation process on the sidewall and a second on the top, ensuring a controlled concentration of doped ions across the fin structure, with an isolation layer between adjacent fins to enhance electrical isolation and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ion implantation is performed on FinFET sidewalls to control doping concentration, then the uniformity of doped ion concentration is improved, but the process complexity increases due to multiple implantation steps required

Engineering Contradiction:
Improveuniformity of doped ion concentrationVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the FinFET structure into distinct regions (sidewalls and top surfaces) and applies ion implantation separately to each region. This segmentation allows independent control of doping concentration in different areas, achieving uniform doping throughout the three-dimensional structure while managing process complexity through systematic multi-step implementation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from conventional planar ion implantation to three-dimensional FinFET structure doping by introducing angularly resolved implantation. Ions are implanted at different angles to reach sidewalls and top surfaces separately, adding a dimensional aspect to the doping process that enables precise control over doping distribution in the vertical and lateral directions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional planar transistor structures are used, then the manufacturing process is simpler, but the device performance degrades due to short-channel effects

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddevice performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs curved or inclined sidewall surfaces in the FinFET structure instead of flat planar surfaces. This curvature enables better gate control over the channel by increasing the effective gate width while maintaining a compact footprint, thereby suppressing short-channel effects and improving device performance without significantly complicating the manufacturing process.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The gate structure is nested around the FinFET channel in a three-dimensional configuration, with the gate wrapping around the sidewalls and top of the fin. This nested arrangement provides superior electrostatic control over the channel compared to planar structures, enhancing device performance while maintaining compatibility with standard semiconductor fabrication processes.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the uniformity of doped ion concentration across the fin structure, enhancing the performance and reliability of the semiconductor device by adjusting the threshold voltage effectively and reducing the short-channel effect.

Implementation Method 1

performing a first ion implantation process on the first sidewall and a top of the fin, and performing a second ion implantation process on the second sidewall and the top of the fin

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS10319839B2Semiconductor structure and fabrication method thereof
Publication Date: 2019.06.11 SEMICON MFG INT (SHANGHAI) CORP
  • US10319839B2 patent drawing
  • US10319839B2 patent drawing
  • US10319839B2 patent drawing

AI summary

A semiconductor structure and a method for fabricating a semiconductor structure are provided. The method includes forming one or more fins on a substrate, wherein each fin includes a first sidewall and a second sidewall opposing each other. The method also includes forming a sacrificial layer over the fin. Further, the method also includes performing a first ion implantation process on the first sidewall and a top of the fin, and performing a second ion implantation process on the second sidewall and the top of the fin.