FinFET Drain Region Dopant Gradient Reduces Hot Carrier Injection

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Solution Overview

Problem

Existing LDMOS devices, particularly N-type, face the issue of hot carrier injection (HCI) at the drain side, which needs to be improved for enhanced performance in high voltage applications.

Innovation Solution

A fin field-effect transistor (finFET) device is designed with a substrate having a fin structure surrounded by a trench isolation region, including a first-type and second-type well region with a trench filled with a silicon nitride trench-fill layer, reducing the electric field strength near the drain side by lowering N-type dopant concentration during ion implantation, thereby reducing HCI.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If N-type dopant concentration is increased to improve device performance, then conductivity is improved, but hot carrier injection (HCI) at the drain side worsens

Engineering Contradiction:
Improvedevice performanceVSAvoidhot carrier injection (HCI)
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating different dopant concentration zones within the drain region. Specifically, the drain extension region has a first dopant concentration while the main drain region has a second, lower dopant concentration. This local differentiation allows the drain extension to provide good conductivity and carrier injection while the main drain region maintains lower HCI, thus resolving the contradiction between overall device performance and local HCI reduction.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the dopant concentration parameter spatially within the device structure. By implementing a gradient or stepped dopant profile where the drain extension has higher concentration (first dopant concentration) and the main drain has lower concentration (second dopant concentration), the patent optimizes both conductivity and HCI reduction. This parameter variation resolves the contradiction by allowing high performance where needed while minimizing harmful effects in critical regions.

Inventive Principle:
Principle #35Parameter changes

2Strength

If breakdown voltage is increased for high voltage applications, then voltage handling capability is improved, but hot carrier generation at the drain side increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidhot carrier generation
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by differentiating the dopant concentration between the drain extension and main drain regions. The drain extension region with higher dopant concentration facilitates carrier injection and maintains good conductivity, while the main drain region with lower dopant concentration reduces hot carrier generation even at high breakdown voltages. This local differentiation allows the device to achieve high voltage capability while minimizing hot carrier effects.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the drain region into two distinct zones: the drain extension region and the main drain region. Each zone has optimized dopant concentration for its specific function. The drain extension handles carrier injection with higher doping, while the main drain handles high voltage with lower doping to reduce hot carrier generation. This segmentation resolves the contradiction between breakdown voltage and hot carrier generation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The finFET device effectively reduces the Isubmax/Id current value and improves HCI at the drain side, enhancing the device's operational performance.

Implementation Method 1

reducing the electric field strength near the drain side by lowering N-type dopant concentration during ion implantation

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

lowering N-type dopant concentration during ion implantation

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Data Source

PatentUS10756209B2Semiconductor device
Publication Date: 2020.08.25 UNITED MICROELECTRONICS CORP
  • US10756209B2 patent drawing
  • US10756209B2 patent drawing
  • US10756209B2 patent drawing

AI summary

A semiconductor device including a substrate having a fin structure surrounded by a trench isolation region; a trench disposed in the fin structure; an interlayer dielectric layer disposed on the substrate; a working gate striding over the fin structure and on the first side of the trench; a dummy gate striding over the fin structure and on the second side of the trench; a doped source region in the fin structure; and a doped drain region in the fin structure. The dummy gate is disposed between the trench and the doped drain region. The fin structure extends along a first direction and the dummy gate extends along a second direction. The first direction is not parallel with the second direction.