FinFET Etching Protection via Dual Protective Layers

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Solution Overview

Problem

Conventional FinFET formation processes often damage the fin structure and isolating regions due to lack of protective layers during etching, affecting yield and performance.

Innovation Solution

A method involving a first protective layer of silicon nitride and a second protective layer of silicon oxide, applied sequentially to protect the oxide regions and fin structures from etching damage, allowing selective removal of the protective layers without harming the oxide layers, followed by forming a second oxide layer to cover the fin structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If protective layers are added to protect fin structure during etching, then damage to fin structure and isolating regions is prevented, but process complexity increases

Engineering Contradiction:
Improveprotection of fin structure and isolating regionsVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protective layer is divided into two distinct segments: a first protective layer (silicon nitride) and a second protective layer (silicon oxide). Each layer serves specific protective functions during different stages of the etching process, allowing selective removal while maintaining protection of the fin structure and isolating regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first protective layer is formed on the fin structure and isolating regions before the etching process begins. This preliminary protective action prevents damage to these critical structures during subsequent etching operations, ensuring their integrity throughout the manufacturing process.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If selective removal of protective layers is implemented, then different oxide layer thicknesses can be achieved, but manufacturing process becomes more complex

Engineering Contradiction:
Improvedifferent oxide layer thicknesses for various device typesVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Different regions of the substrate receive different treatments through selective removal of protective layers. The first protective layer is removed in first regions to expose the fin structure for additional oxide layer formation, while the second protective layer remains in second regions to maintain the original oxide layer thickness, enabling local customization for different device types.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thickness parameter of the oxide layer is varied across different regions by controlling which protective layer is removed. This allows optimization of oxide layer thickness for specific device requirements (e.g., threshold voltage control) while using a standardized multi-layer protective structure.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If silicon nitride first protective layer is used with high selectivity, then etching precision is improved, but material selection and process control become more difficult

Engineering Contradiction:
Improveetching precisionVSAvoidmaterial selection and process control
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The protective layer structure uses a composite of two different materials: silicon nitride (first protective layer) and silicon oxide (second protective layer). This composite structure provides high etching selectivity between the protective layers and the underlying structures, enabling precise control of the etching process while protecting critical features.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS8951884B1Method for forming a FinFET structure
Publication Date: 2015.02.10 UNITED MICROELECTRONICS CORP
  • US8951884B1 patent drawing
  • US8951884B1 patent drawing
  • US8951884B1 patent drawing

AI summary

A method for forming a FinFET structure includes providing a substrate, a first region and a second region being defined on the substrate, a first fin structure and a second fin structure being disposed on the substrate within the first region and the second region respectively. A first oxide layer cover the first fin structure and the second fin structure. Next a first protective layer and a second protective layer are entirely formed on the substrate and the first oxide layer in sequence, the second protective layer within the first region is removed, and the first protective layer within the first region is then removed. Afterwards, the first oxide layer covering the first fin structure and the second protective layer within the second region are removed simultaneously, and a second oxide layer is formed to cover the first fin structure.