FinFET Gate Structure With Thinned Dummy Gate for Void-Free Filling
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Solution Overview
Problem
In the semiconductor industry, the formation of FinFET devices faces challenges in reducing feature sizes and filling gaps between fins, leading to voids and defects in gate electrodes, which affect the performance and reliability of the metal gate structure due to incomplete deposition of materials as dimensions shrink.
Innovation Solution
A method is developed to form a dummy gate with a thinned lower portion and a gate fill material around it, followed by spacer formation and replacement with a metal gate, ensuring complete filling and reducing voids by adjusting etching processes to control lateral etching rates and selectivity, thereby improving the metal gate structure's integrity and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature size is reduced to increase integration density, then more components can be integrated into a given area, but voids and defects form in gate electrodes during material deposition
Solution Approach 1:
A dummy gate structure is formed preliminarily over the fin structure before the actual metal gate deposition. This dummy gate serves as a sacrificial placeholder that enables complete material deposition in the gap regions between fins. After the metal gate is successfully formed, the dummy gate is removed through selective etching, leaving a void-free metal gate structure.
Solution Approach 2:
The dummy gate acts as an intermediary element during the fabrication process. It temporarily occupies the space where the metal gate will eventually be formed, allowing deposition materials to be deposited completely without forming voids. The dummy gate is then removed, having served its mediating function in achieving defect-free metal gate formation.
2Productivity
If conventional gate formation methods are used with reduced feature sizes, then integration density improves, but leakage current increases due to incomplete gate electrode deposition
Solution Approach 1:
The dummy gate is formed in advance to establish a complete, void-free structure that prevents leakage current pathways. This preliminary structure ensures that when materials are deposited for the metal gate, they fully fill the gap regions between fins, eliminating the incomplete deposition that would otherwise create leakage paths.
Solution Approach 2:
The dummy gate, which is ultimately removed, serves a beneficial function during the fabrication process by enabling complete metal gate deposition. Its temporary presence converts the potential harm of void formation into the benefit of achieving complete material filling, thereby preventing leakage current in the final device.
3Ease of manufacture
If standard deposition processes are used for metal gate formation, then fabrication simplicity is maintained, but voids and defects occur due to incomplete material filling in gap regions
Solution Approach 1:
The dummy gate structure is formed preliminarily to provide a complete template for metal gate deposition. This allows standard deposition processes to be used without modification, as the dummy gate ensures complete material filling occurs naturally during the deposition process, eliminating voids and defects.
Solution Approach 2:
The dummy gate serves as an intermediary that enables standard deposition processes to achieve complete filling. By providing a physical template during deposition, it allows conventional fabrication processes to produce defect-free metal gates without requiring complex process modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the metal gate structure's quality by eliminating voids and defects, improving electrical resistance and reducing leakage current, while allowing for smaller feature sizes and more efficient semiconductor device fabrication.
Implementation Method 1
adjusting etching processes to control lateral etching rates
Implementation Method 2
incomplete deposition of materials as dimensions shrink
Data Source
AI summary
A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate over the fin; reducing a thickness of a lower portion of the dummy gate proximate to the isolation regions, where after reducing the thickness, a distance between opposing sidewalls of the lower portion of the dummy gate decreases as the dummy gate extends toward the isolation regions; after reducing the thickness, forming a gate fill material along at least the opposing sidewalls of the lower portion of the dummy gate; forming gate spacers along sidewalls of the dummy gate and along sidewalls of the gate fill material; and replacing the dummy gate with a metal gate.


