FinFET Edge Fin Gate Layout for Adjustable Channel Width
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Solution Overview
Problem
Current semiconductor technologies face challenges in adjusting the effective channel width of transistors, particularly in FinFET structures, where the channel width is fixed and can only be increased by adding more fins, limiting flexibility and leading to issues with leakage and driving currents.
Innovation Solution
A semiconductor structure and method that includes a substrate with parallel fins, where the edge fin closest to the boundary is used, and a gate structure spanning the fin, with the gate structure exposing part of the outer side wall, allowing for adjustment of the effective channel width by etching the gate on the outer side wall, thereby reducing the area covered by the gate and optimizing channel dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the channel length is reduced to adapt to process node scaling, then the device size decreases, but the gate control ability deteriorates and short-channel effects increase
Solution Approach 1:
The patent transitions from planar MOSFETs to FinFETs, utilizing a three-dimensional fin structure that extends vertically from the substrate. This dimensional change allows the gate to control the channel from multiple sides (top and two lateral sides), significantly improving gate control ability despite reduced channel length. The fin structure creates a pseudo-three-dimensional channel that enhances electrostatic control over the shortened channel.
Solution Approach 2:
The patent employs a composite material structure with different semiconductor layers (e.g., silicon fin, silicon-germanium sacrificial layer) to create the FinFET structure. The selective etching of these composite materials allows formation of the suspended fin structure that enables enhanced gate control while maintaining scaled dimensions.
2Adaptability or versatility
If the effective channel width is fixed in FinFET structures, then the device structure is simplified, but the flexibility to adjust transistor performance is limited
Solution Approach 1:
The patent introduces a movable gate structure that can be selectively etched away from portions of the fin, particularly from edge fins. This dynamic modification allows the effective channel width to be adjusted by controlling which portions of the fin remain covered by the gate, enabling flexible performance tuning without fundamentally changing the FinFET device structure.
Solution Approach 2:
The patent segments the gate structure's coverage along the fin array, allowing different portions of fins to have different gate coverage. Specifically, the gate may be removed from edge fins while remaining on central fins, creating segments with different effective channel widths within the same device structure, thereby increasing adaptability.
Data Source
AI summary
Provided are a semiconductor structure and a forming method thereof, and a photomask layout. One form of a semiconductor structure includes: a base, including a substrate and a plurality of fins arranged in parallel on the substrate, the substrate including a transistor cell area, and in the transistor cell area, in a direction perpendicular to an extending direction of the fin, the fin closest to a boundary of the transistor cell area being used as an edge fin, and the edge fin having an outer side wall facing the boundary of the transistor cell area; and a gate structure, spanning the fin and covering a part of a top and a part of a side wall of the fin, and the gate structure exposing at least a part of an outer side wall of any of the edge fins.