FinFET Embedded Resistor Layout for Flicker Noise Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the noise effects, particularly flicker noise, in transistor devices as integration density increases, and existing methods do not efficiently address this issue while maintaining manufacturing cost-effectiveness.
Innovation Solution
The integration of resistors, including passive and active resistors, formed within the same fin as FinFETs, using the same processing steps, which reduces device size and manufacturing costs, and employing source-degeneration configurations to mitigate noise effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If transistors and resistors are integrated in the same fin using the same processing steps, then device size is reduced and manufacturing cost is lowered, but manufacturing precision requirements increase
Solution Approach 1:
The patent merges the formation of transistors and resistors into a single integrated process. Both device types are formed in the same fin structure using identical processing steps, eliminating the need for separate manufacturing sequences. This consolidation reduces the overall device footprint and simplifies fabrication while maintaining precise control over device characteristics through shared process parameters.
Solution Approach 2:
The fin structure serves multiple functions simultaneously: it acts as the active region for transistors, the resistor formation region, and the structural support element. The gate electrode and source/drain regions are configured to perform both transistor switching and resistor functionality within the same physical structure, enabling multi-functional operation that reduces device complexity.
2Object-affected harmful factors
If resistors are integrated with transistors in source-degenerated configuration, then noise is reduced, but device complexity increases
Solution Approach 1:
The resistor is merged with the transistor structure in a source-degenerated configuration, where the resistor is formed in the same fin as the transistor with shared source/drain regions. This integration eliminates the need for separate resistor components and interconnects, reducing overall device complexity while achieving noise reduction through the degeneration effect.
Solution Approach 2:
The shared source/drain region acts as an intermediary element that serves dual purposes: it functions as the active region for transistor operation and as the resistor element for noise reduction. This intermediary structure enables the source-degeneration effect without requiring separate discrete components, thereby reducing device complexity.
Data Source
AI summary
Embodiments include a FinFET transistor including an embedded resistor disposed in the fin between the source epitaxial region and the source contact. A control contact may be used to bias the embedded resistor, thereby changing the resistivity of the resistor. Edge gates of the FinFET transistor may be replaced with insulating structures. Multiple ones of the FinFET/embedded resistor combination may be utilized together in a common drain/common source contact design.