Selective Epitaxial Growth for FinFET Channel Width Control
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Solution Overview
Problem
The existing methods for forming FinFET semiconductor devices on bulk silicon substrates face challenges such as deep trench formation issues and inability to selectively adjust channel widths for N-type and P-type devices, leading to inefficiencies in fin height and channel width control.
Innovation Solution
The proposed solution involves performing a selective epitaxial growth process to form semiconducting material layers on a substrate, allowing for the formation of FinFET devices with varying fin heights and widths, enabling flexible design of source/drain structures and gate electrodes, and improving electrostatic control and current conduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If deep trenches are formed to create fins on bulk silicon substrates, then FinFET devices can be formed, but manufacturing complexity and process difficulty increase significantly
Solution Approach 1:
The process segments the fin formation into distinct stages: first forming isolation trenches to a shallow depth, then performing selective epitaxial growth to build fins to the desired height in a controlled manner. This segmentation avoids the complexity of forming single deep trenches while achieving the same functional result.
Solution Approach 2:
Isolation trenches are formed preliminarily before fin formation. This preliminary action creates defined regions for subsequent selective epitaxial growth, enabling precise control over fin location and height without requiring complex deep trench formation processes.
2Ease of manufacture
If uniform fin structures are formed using conventional processes, then manufacturing is simpler, but channel width cannot be selectively adjusted for N-type and P-type devices
Solution Approach 1:
The selective epitaxial growth process applies different growth conditions to different regions of the substrate. By controlling exposure and growth parameters, fins for N-type and P-type devices can be grown to different heights and widths in the same process batch, enabling local customization without adding manufacturing steps.
Solution Approach 2:
The process utilizes changes in epitaxial growth parameters (temperature, pressure, gas flow, exposure time) to selectively control fin dimensions. By adjusting these parameters during the growth process, different fin geometries can be achieved for different device types, providing versatility while maintaining process simplicity.
3Speed
If channel length is decreased to improve switching speed, then operating speed increases, but short channel effects and leakage currents increase
Solution Approach 1:
The invention transitions from planar FET geometry to three-dimensional FinFET structure. By growing vertical fins from the substrate, the channel extends in the vertical dimension while maintaining a short horizontal length. This dimensional change provides better gate control over the channel, reducing short channel effects and leakage currents even when the channel length is short.
Solution Approach 2:
The FinFET structure combines multiple materials (semiconductor fins, gate dielectric, gate electrode, source/drain regions) in a composite architecture. This composite structure enables the gate to effectively control the channel while maintaining short channel length, as the vertical fin geometry provides enhanced electrostatic control compared to planar structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the manufacturing flexibility and efficiency of FinFET devices, reducing leakage currents and improving switching performance by allowing for adjustable channel widths and fin heights, thereby addressing the short channel effects and increasing drive current density.
Implementation Method 1
performing an epitaxial growth process to form a layer of semiconducting material on a semiconducting substrate
Data Source
AI summary
A method of forming a FinFET device involves performing an epitaxial growth process to form a layer of semiconducting material on a semiconducting substrate, wherein a first portion of the layer of semiconducting material will become a fin structure for the FinFET device and wherein a plurality of second portions of the layer of semiconducting material will become source/drain structures of the FinFET device, forming a gate insulation layer around at least a portion of the fin structure and forming a gate electrode above the gate insulation layer.