FinFET Epitaxial Structure Height Control
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Solution Overview
Problem
Existing FinFET devices face challenges in achieving consistent height and width variations of source/drain epitaxial structures, which affect the complexity and efficiency of the fabrication process.
Innovation Solution
A method for fabricating FinFET devices that involves forming sidewall spacers along the gate stack and fins, recessing trenches, and growing epitaxial structures with tunable height and width by adjusting the fin-spacer-height, allowing for better control over the epitaxial structure dimensions and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional planar transistors are used, then manufacturing process is simpler, but functional density and scaling efficiency are limited
Solution Approach 1:
The patent transitions from planar (2D) transistor structures to three-dimensional FinFET structures with vertical fins extending from the substrate. This dimensional change increases the effective channel area and gate control without increasing the planar footprint, thereby improving functional density while managing structural complexity through systematic fabrication processes
2Productivity
If FinFET structures are implemented to increase functional density, then scaling efficiency improves, but variation in height and width of source/drain epitaxial structures increases process complexity
Solution Approach 1:
The patent performs preliminary actions by forming sacrificial mandrels and sidewall spacers before growing the epitaxial source/drain structures. These preliminary structures define precise geometric boundaries that constrain the epitaxial growth, ensuring uniform height and width variations. The mandrels and spacers are removed after defining the epitaxial structure dimensions, leaving controlled variations suitable for scaling
Solution Approach 2:
The patent controls epitaxial structure dimensions by adjusting growth parameters such as temperature, pressure, and precursor flow rates during the epitaxial growth process. By optimizing these parameters, the patent achieves consistent height and width variations across different FinFET devices, reducing process complexity despite the three-dimensional structure requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise control over the epitaxial structure dimensions, enhancing the performance of FinFET devices by optimizing the height, width, and merging distance of epitaxial structures, thereby improving manufacturing efficiency and device complexity.
Implementation Method 1
growing epitaxial structures with tunable height and width by adjusting the fin-spacer-height
Data Source
AI summary
A FinFET device includes a substrate, a fin, and isolation regions on either side of the fin. The device also includes sidewall spacers above the isolation regions and formed along the fin structure. A recessing trench is formed by the sidewall spacers and the fin, and an epitaxially-grown semiconductor material is formed in and above the recessing trench, forming an epitaxial structure.