FinFET Epitaxial Layer Protection via Nitrogen Dielectric Cap

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Solution Overview

Problem

The integration of fin-shaped structures and epitaxial layers in FinFET fabrication leads to current leakage and performance issues, necessitating improvements in the current FinFET process.

Innovation Solution

A method involving the formation of a first contact etch stop layer (CESL) on an epitaxial layer, followed by a cap layer and a second CESL, which replaces the conventional silicon oxide cap layer to prevent surface damage during ion implantation and enhance device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional silicon oxide cap layer is used on the epitaxial layer, then the epitaxial layer is protected during processing, but surface damage occurs during ion implantation requiring damaging cleaning agents like diluted hydrofluoric acid

Engineering Contradiction:
Improveepitaxial layer protectionVSAvoidsurface damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter of the cap layer from conventional silicon oxide to a nitrogen-containing dielectric material (such as silicon nitride or silicon oxynitride). This material substitution alters the interaction between the cap layer and ion implantation processes, preventing surface damage to the epitaxial layer while maintaining protective functions during subsequent processing steps.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The nitrogen-containing dielectric cap layer serves as an intermediary between the ion implantation process and the epitaxial layer. Instead of allowing direct damage to the epitaxial layer surface, this intermediate layer absorbs or deflects the harmful effects of ion implantation, eliminating the need for aggressive cleaning agents like diluted hydrofluoric acid that would otherwise be required to remove damaged surfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of moving object

If the FinFET structure is scaled down to reduce device size, then integration density increases, but current leakage and performance issues worsen

Engineering Contradiction:
Improvedevice sizeVSAvoidcurrent leakage
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent introduces nitrogen-containing dielectric materials with specific electrical properties that differ from conventional silicon oxide. These materials provide better electrical isolation and control characteristics that prevent current leakage in scaled-down FinFET structures, maintaining device performance despite reduced dimensions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The use of nitrogen-containing dielectric materials represents a composite approach to cap layer design, combining dielectric properties with nitrogen incorporation to achieve both mechanical protection and electrical control. This composite material structure addresses multiple performance requirements simultaneously in miniaturized devices.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces current leakage and improves overall device performance by eliminating the need for damaging cleaning agents like diluted hydrofluoric acid, allowing for precise control of the FinFET structure and operation.

Implementation Method 1

forming an epitaxial layer on the fin-shaped structure

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

replaces the conventional silicon oxide cap layer to prevent surface damage during ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS9530871B1Method for fabricating a semiconductor device
Publication Date: 2016.12.27 MARLIN SEMICON LTD
  • US9530871B1 patent drawing
  • US9530871B1 patent drawing
  • US9530871B1 patent drawing

AI summary

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.