Semiconductor FinFET Sidewall Defect Reduction via Epitaxial Source Drain Formation
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Solution Overview
Problem
Current semiconductor device manufacturing techniques face challenges in reducing failures associated with sidewall defects of gates, sources, and drains in multi-gate transistor structures, which can affect device performance.
Innovation Solution
The method involves forming spaced apart fins on a substrate, creating an isolation layer between them, and forming a gate electrode that crosses the fins, followed by the formation of source/drain regions using epitaxial growth. This process includes forming spacers and recessing the fin surfaces to position the source/drain regions correctly, and then removing portions of the gate electrode to expose the isolation layer, thereby reducing the likelihood of sidewall failures during epitaxial growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If source/drain regions are formed before gate electrode separation, then device performance is improved by reducing sidewall failures, but process complexity increases
Solution Approach 1:
The source and drain regions are formed in advance before the gate electrode is separated into individual gates. This preliminary formation of source/drain regions allows the subsequent gate separation process to proceed without causing sidewall damage to the source/drain structures, thereby improving device reliability while managing process complexity through strategic sequencing of manufacturing steps
2Manufacturing precision
If gate electrode is removed between fins to expose isolation layer, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The gate electrode is separated into individual gates between adjacent fins by removing portions of the gate electrode to expose the isolation layer. This segmentation creates precisely aligned individual gates for each transistor, improving manufacturing precision by ensuring proper gate positioning and electrical isolation, while the added structural complexity is managed through the natural transistor layout requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves semiconductor device performance by reducing failures and defects in the sidewalls of gates, sources, and drains, enhancing the reliability and efficiency of the manufacturing process.
Implementation Method 1
The source/drain regions may be formed, for example, by epitaxial growth
Data Source
AI summary
Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.