FinFET Channel Epitaxy Without Vacuum Break to Suppress Ge Diffusion
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Solution Overview
Problem
The semiconductor industry faces challenges in fabricating high-density, high-performance Fin FET devices due to issues related to the formation of semiconductor fins with high aspect ratios and the control of channel and source/drain regions.
Innovation Solution
The method involves forming fin structures with specific pitches and forming dielectric layers with varying etching rates to create a hybrid fin structure. A cleaning operation using a mixed gas of HF, NH3, and N2 is performed, followed by epitaxial growth of a cap semiconductor layer over the channel regions, all within the same chamber without breaking vacuum.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Ge is used in channel regions to improve carrier mobility and device performance, then electrical performance is improved, but Ge diffusion to surrounding structures occurs causing contamination and device failure
Solution Approach 1:
A cap semiconductor layer is introduced as an intermediary between the Ge channel region and the surrounding environment. This cap layer acts as a diffusion barrier that prevents Ge from migrating to adjacent structures while allowing the Ge channel to maintain its electrical performance benefits.
Solution Approach 2:
The cap semiconductor layer is formed over the Ge channel region before subsequent processing steps. This preliminary action establishes the diffusion barrier in advance, preventing Ge contamination during later fabrication processes such as high-temperature annealing or additional deposition steps.
2Manufacturing precision
If multiple process steps are performed separately in different chambers, then process control is improved, but production time and complexity increase
Solution Approach 1:
Multiple process steps including cleaning operations and epitaxial growth are merged into a single continuous process performed in one chamber without breaking vacuum. This integration maintains precise process control while eliminating time losses associated with chamber transitions and vacuum breaking.
Solution Approach 2:
The process maintains continuous operation by performing cleaning and epitaxial growth sequentially in the same chamber without interrupting the vacuum environment. This continuity eliminates idle time and maintains optimal process conditions throughout the entire sequence of operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses Ge diffusion and oxygen contamination, improving the electrical properties of FinFET devices and enabling the formation of wall fin structures between fin structures, enhancing device performance.
Implementation Method 1
A cleaning operation using a mixed gas of HF, NH3, and N2 is performed
Implementation Method 2
epitaxial growth of a cap semiconductor layer over the channel regions
Data Source
AI summary
In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.