FinFET Substrate Epitaxy for Higher Latch-Up Trigger Voltage
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Solution Overview
Problem
Integrated circuits (ICs) with FinFETs are susceptible to latch-up, an unintended low-impedance path caused by parasitic devices, which can lead to malfunction or destruction of the IC due to triggering events like voltage spikes.
Innovation Solution
The integration of an epitaxial structure with a higher doping concentration than the doped regions in the IC, which is electrically coupled to the doped regions and disposed between them and the semiconductor substrate, effectively reduces the equivalent resistance and increases the latch-up trigger voltage, thereby enhancing latch-up immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FinFETs are used to reduce feature sizes and power consumption, then device density and efficiency are improved, but susceptibility to latch-up events increases due to parasitic structures
Solution Approach 1:
An epitaxial structure is introduced as an intermediary element between the doped regions and the semiconductor substrate. This epitaxial structure acts as a mediator that reduces the equivalent resistance of the substrate, thereby increasing the latch-up trigger voltage and protecting the FinFETs from latch-up events while maintaining high device density
Solution Approach 2:
The patent changes the physical parameters of the substrate by introducing an epitaxial structure with specific doping characteristics. This epitaxial structure has a doping concentration that is higher than the doped regions but lower than the substrate, creating a gradient that modifies the electrical properties and increases the latch-up trigger voltage
2Productivity
If doped regions are placed in close proximity to increase functional density, then device integration is improved, but parasitic structures that cause latch-up are formed
Solution Approach 1:
The epitaxial structure serves as an intermediary layer between closely spaced doped regions, modifying the electrical field distribution and preventing the formation of low-impedance parasitic paths that would otherwise form due to the close proximity of the doped regions
Solution Approach 2:
The patent applies local quality by creating a non-uniform doping structure where the epitaxial region has intermediate doping characteristics between the highly doped regions and the lightly doped substrate. This local variation in doping quality prevents parasitic device formation in critical areas while maintaining high functional density
3Reliability
If the substrate resistance is reduced to increase latch-up trigger voltage, then latch-up immunity is improved, but the equivalent resistance of the substrate must be modified
Solution Approach 1:
The substrate is segmented into distinct regions: highly doped regions, an intermediate epitaxial structure, and a lightly doped substrate. This segmentation allows each region to perform its specific function - the epitaxial structure specifically reduces the equivalent resistance to increase latch-up trigger voltage while maintaining overall structural integrity
Solution Approach 2:
The patent uses a composite structure combining different doped regions and an epitaxial layer with intermediate properties. This composite approach allows optimization of specific electrical properties (equivalent resistance) without completely redesigning the entire substrate, balancing latch-up immunity with structural simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of the epitaxial structure increases the latch-up trigger voltage, reducing the likelihood of latch-up events and improving the overall immunity of the IC to such events, thus preventing malfunction or destruction.
Implementation Method 1
the epitaxial structure reduces the equivalent resistance and increases the latch-up trigger voltage
Data Source
AI summary
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.