FinFET Epitaxial Structures with Sidewall Spacers for Growth Control

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Solution Overview

Problem

The development of FinFETs in semiconductor technology faces challenges in achieving efficient epitaxial growth and integration of semiconductor fins due to limitations in patterning and epitaxial feature formation, which affect device performance and density.

Innovation Solution

The use of fin sidewall spacers to control epitaxial growth by limiting the lateral expansion of epitaxial features, combined with varying recess depths and configurations to enhance the size and integration of epitaxial features on semiconductor fins, allowing for improved FinFET device fabrication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If fin sidewall spacers are used to control epitaxial growth, then manufacturing precision of epitaxial features is improved, but device complexity increases

Engineering Contradiction:
Improveepitaxial feature formationVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Fin sidewall spacers are formed on the sidewalls of semiconductor fins before epitaxial growth occurs. These spacers serve as preliminary structures that define and control the lateral boundaries of subsequent epitaxial feature growth, ensuring precise formation without requiring complex real-time control mechanisms during the epitaxial process itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fin sidewall spacers act as intermediary structures between the semiconductor fins and the epitaxial features. They mediate the epitaxial growth process by providing physical boundaries that guide lateral expansion, thereby simplifying the overall fabrication process while maintaining high manufacturing precision for epitaxial feature formation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If recess depths are varied to enhance epitaxial feature size, then device density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveepitaxial feature sizeVSAvoidrecess depth control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

Different recess depths are implemented at different locations within the semiconductor device structure. This local variation in recess depth allows optimization of epitaxial feature sizes in specific regions to meet performance requirements, while the fin sidewall spacers provide consistent lateral boundary control across all regions, managing the precision requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables more efficient epitaxial growth and integration of semiconductor fins, enhancing device performance and density in FinFETs, thereby addressing the limitations of existing fabrication methods.

Implementation Method 1

The use of fin sidewall spacers to control epitaxial growth by limiting the lateral expansion of epitaxial features

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12419101B2Integrated circuit device
Publication Date: 2025.09.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12419101B2 patent drawing
  • US12419101B2 patent drawing
  • US12419101B2 patent drawing

AI summary

An integrated circuit device is provided. The integrated circuit device includes a semiconductor substrate, first and second semiconductor fins over the semiconductor substrate, and first and second epitaxy structures respectively on the first and second semiconductor fins. The first epitaxy structure is merged with the second epitaxy structure, and a bottom surface of the second epitaxy structure is lower than a bottom surface of the first epitaxy structure.