FinFET Source/Drain Epitaxy With Silane for Lower Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in Fin Field-Effect Transistor (FinFET) manufacturing is to increase the source/drain dopant concentration to reduce resistance while maintaining process efficiency and complexity control, as conventional methods struggle to achieve high phosphorous atomic percentages in epitaxy layers without compromising the integrity of the semiconductor material.
Innovation Solution
Incorporating silane into the process gases during epitaxial growth of source/drain regions, specifically using a combination of dichlorosilane (DCS) and phosphine (PH3) with varying silane flow rates to achieve higher phosphorous atomic percentages, thereby enhancing dopant concentration without increasing the flow rate of PH3, which helps in forming stable Si—P bonds and increasing the phosphorous content in the epitaxy layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the phosphorous atomic percentage in epitaxy layers is increased to reduce source/drain resistance, then the conductivity improves, but the process complexity increases and the integrity of semiconductor material may be compromised
Solution Approach 1:
The patent changes the chemical composition parameters of the process gas by introducing silane (SiH4) alongside dichlorosilane (DCS) and phosphine (PH3). This parameter change enables the formation of stable Si-P bonds during epitaxial growth, allowing higher phosphorous atomic percentages (up to 11%) to be achieved without compromising semiconductor material integrity, thus improving conductivity while maintaining process control
Solution Approach 2:
Silane acts as an intermediary substance that facilitates the incorporation of phosphorous into the epitaxy layers. The silane provides silicon atoms that bond with phosphorous during growth, enabling stable Si-P bond formation. This intermediary mechanism allows high dopant concentration to be achieved without directly increasing PH3 flow rate, thereby improving conductivity while avoiding process complexity and material integrity issues
2Quantity of substance
If the flow rate of phosphine (PH3) is increased to achieve higher phosphorous atomic percentages, then the dopant concentration increases, but the process complexity and potential harm to semiconductor integrity increase
Solution Approach 1:
Silane serves as an intermediary that enables phosphorous incorporation through stable Si-P bond formation rather than direct PH3 decomposition. This intermediary mechanism allows phosphorous to be incorporated at high concentrations (up to 11% atomic percentage) without the harmful effects associated with excessive PH3 flow rates, such as gas phase reactions and compromised semiconductor integrity
Solution Approach 2:
The patent changes the process gas composition by introducing silane and optimizing the ratio of DCS to SiH4. This parameter change shifts the mechanism of phosphorous incorporation from direct PH3 reaction to Si-P bond formation during epitaxial growth, enabling high phosphorous content (up to 11%) without harming semiconductor material integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for significant increases in phosphorous atomic percentages up to 11%, improving the conductivity of FinFETs by increasing the dopant concentration, reducing source/drain resistance, and simplifying the process by adjusting silane flow rates without altering other process conditions, thus enhancing the performance and efficiency of FinFETs.
Implementation Method 1
performing a first epitaxy to grow a first epitaxy layer extending into the recess... performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer
Implementation Method 2
The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas... The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas
Implementation Method 3
increasing source/drain dopant concentration to reduced resistance... enhance dopant concentration without increasing the flow rate of PH3
Data Source
AI summary
A method includes recessing a semiconductor fin to form a recess, wherein the semiconductor fin protrudes higher than isolation regions on opposite sides of the semiconductor fin, and performing a first epitaxy to grow a first epitaxy layer extending into the recess. The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas. The first epitaxy layer has a first phosphorous atomic percentage. The method further includes performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer. The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas. The second epitaxy layer has a second phosphorous atomic percentage higher than the first phosphorous atomic percentage.


