FinFET Epitaxy Source/Drain Layout for SRAM Mobility Control
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher device density and performance in FinFETs due to fabrication and design issues, particularly in static random-access memory (SRAM) cells, where three-dimensional designs like FinFETs are used to reduce short channel effects.
Innovation Solution
The formation of epitaxy structures on semiconductor fins in SRAM cells, utilizing FinFETs, with dielectric fin sidewall structures to adjust epitaxy growth both vertically and laterally, enhancing carrier mobility and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FinFET three-dimensional design is used to reduce short channel effects, then device performance is improved, but fabrication complexity increases
Solution Approach 1:
The source/drain structure is segmented into multiple regions with different doping concentrations and crystal orientations. The epitaxial structure is divided into first and second regions with different doping types, creating a segmented approach to managing short channel effects while maintaining fabrication feasibility through region-specific optimization.
Solution Approach 2:
Different regions of the source/drain structure are assigned different local properties: the first epitaxial region has a first doping concentration and orientation, while the second epitaxial region has a second doping concentration and orientation. This local quality differentiation allows optimization of carrier mobility in specific areas without compromising overall device performance.
2Reliability
If epitaxy structures are formed to enhance carrier mobility, then device performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
Dielectric fin sidewall structures are formed beforehand to serve as templates and growth control elements. These pre-formed structures guide the subsequent epitaxial growth process, ensuring precise vertical and lateral dimensions are achieved without requiring extremely tight process control during the epitaxy step itself.
Solution Approach 2:
The dielectric fin sidewall structures act as intermediary elements between the substrate and the epitaxial growth process. They mediate the growth by providing physical boundaries and chemical environment control, allowing the epitaxial structures to achieve desired dimensions and properties with reduced sensitivity to process variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances carrier mobility and improves device performance by forming epitaxy structures that are strained or stressed, increasing packing density and efficiency in SRAM cells.
Implementation Method 1
The formation of epitaxy structures on semiconductor fins in SRAM cells, utilizing FinFETs, with dielectric fin sidewall structures to adjust epitaxy growth both vertically and laterally
Implementation Method 2
forming epitaxy structures that are strained or stressed, increasing packing density and efficiency in SRAM cells
Data Source
AI summary
An IC structure includes a first fin structure, a first epitaxial structure, first sidewall spacers, a second fin structure, a second epitaxial structure, and second sidewall spacers. The first epitaxial structure is on the first structure. The first sidewall spacers are respectively on opposite sidewalls of the first epitaxial structure. The second epitaxial structure is on the second fin structure. The second sidewall spacers are respectively on opposite sidewalls of the second epitaxial structure. A height difference between the second sidewall spacers is greater than a height difference between the first sidewall spacers.