FinFET Epitaxy Region Layout to Increase Volume Without Bridging
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Solution Overview
Problem
The challenge in Fin Field-Effect Transistor (FinFET) manufacturing is to increase the volume of epitaxy regions while minimizing the risk of bridging between neighboring FinFETs, which is exacerbated by the scaling down of IC geometry.
Innovation Solution
The solution involves forming fin spacers with different heights, where the outer fin spacers are taller than the inner fin spacers, thereby increasing the volume of epitaxy regions and reducing strain, while also minimizing the risk of bridging between neighboring FinFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the volume of epitaxy regions is increased to enhance strain, then the reliability of FinFETs is improved, but the risk of bridging between neighboring FinFETs increases
Solution Approach 1:
The patent divides the epitaxy regions into separate, isolated segments by etching trenches between adjacent FinFET structures. This segmentation prevents the epitaxy regions from merging or bridging to neighboring devices while still allowing each region to achieve sufficient volume for strain enhancement. The trenches act as physical barriers that maintain device isolation.
Solution Approach 2:
The patent applies different etching depths and spacer heights to different regions of the substrate. Specifically, mandrel structures are formed with varying heights in different areas, causing the epitaxy regions to have different volumes and strain levels localized to specific device regions. This allows optimization of strain for each device while maintaining proper isolation.
2Productivity
If the geometry size is scaled down to increase functional density, then the productivity is improved, but the manufacturing precision required increases
Solution Approach 1:
The patent performs preliminary etching of trenches and formation of mandrel structures with precise height variations before the epitaxy growth step. By pre-establishing the geometric framework and isolation structures, the subsequent epitaxy process can proceed with standard precision requirements while still achieving the desired strain enhancement. This preliminary structuring simplifies the overall manufacturing precision requirements.
Solution Approach 2:
The patent introduces mandrel structures and spacer layers as intermediary elements that mediate between the scaling requirements and the strain enhancement requirements. These intermediary structures enable precise control over epitaxy region geometry and volume without directly requiring ultra-precise control of the epitaxy growth process itself, thus reducing manufacturing precision challenges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the volume of epitaxy regions and enhances the strain applied by these regions, while reducing the likelihood of bridging between neighboring FinFETs, thus improving the manufacturing efficiency and reliability of FinFETs.
Implementation Method 1
epitaxially growing epitaxy regions based on the plurality of semiconductor fins
Data Source
AI summary
A method includes forming a gate stack on a plurality of semiconductor fins. The plurality of semiconductor fins includes a plurality of inner fins, and a first outer fin and a second outer fin on opposite sides of the plurality of inner fins. Epitaxy regions are grown based on the plurality of semiconductor fins, and a first height of the epitaxy regions measured along an outer sidewall of the first outer fin is smaller than a second height of the epitaxy regions measured along an inner sidewall of the first outer fin.