FinFET Fin Capacitor Structure for Higher Decoupling Density
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Solution Overview
Problem
As semiconductor IC dimensions shrink, the capacitance density of traditional metal-oxide-metal (MOM) capacitors decreases significantly, leading to a need for improved decoupling capacitors that maintain or increase capacitance density while being compatible with transistor manufacturing processes.
Innovation Solution
The development of fin capacitors, which utilize silicon fins and dielectric materials within the FinFET manufacturing process to enhance capacitance density, featuring closer conductor spacing and multiple layers of conductors and insulating materials, increasing capacitance density by up to 238% compared to MOM capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional MOM capacitor designs are used, then manufacturing process compatibility is maintained, but capacitance density decreases significantly as IC dimensions shrink
Solution Approach 1:
The patent transitions from planar MOM capacitor structures to three-dimensional fin capacitor structures. The fin capacitors utilize vertical fins extending from the substrate, creating multiple capacitance-forming surfaces (top, bottom, and sidewalls) that stack in the vertical dimension. This dimensional transition allows capacitance density to increase dramatically without requiring additional lateral area, effectively decoupling capacitance density from planar scaling constraints.
Solution Approach 2:
The fin capacitor structure embeds multiple conductive elements and dielectric layers within the fin geometry. The fins are nested within the substrate, with conductors positioned at different heights and locations along the fin structure. This nested arrangement maximizes the use of available three-dimensional space, allowing multiple capacitor elements to occupy what would traditionally be a single planar footprint.
2Productivity
If IC dimensions are reduced to increase circuit integration, then more circuitry fits in smaller areas, but capacitor capacitance density decreases by about 30% per technology node
Solution Approach 1:
The fin capacitor structure exploits the vertical dimension to maintain and increase capacitance density as lateral dimensions are reduced. By forming fins that extend vertically from the substrate and positioning conductors at multiple heights, the design achieves high capacitance values without requiring increased lateral footprint. This allows the capacitor to scale with reduced technology nodes while maintaining or improving capacitance density.
Solution Approach 2:
The capacitor structure is segmented into multiple discrete fin elements, each contributing to the total capacitance. These fins can be distributed across the available area, with each fin acting as an independent capacitance element. This segmentation allows the total capacitance to be distributed throughout the three-dimensional space, maximizing the use of available volume and maintaining high capacitance density even as overall device dimensions are reduced.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The fin capacitor design significantly increases capacitance density, addressing the decreasing capacitance issue in MOM capacitors, enabling more efficient noise reduction in integrated circuits with minimal additional processing steps, thus supporting the integration of more circuitry in smaller areas.
Implementation Method 1
a capacitor used to decouple one part of an electrical network (circuit) from another
Implementation Method 2
insulating material between the first and second electrical conductors
Data Source
AI summary
A semiconductor device including field-effect transistors (finFETs) and fin capacitors are formed on a silicon substrate. The fin capacitors include silicon fins, one or more electrical conductors between the silicon fins, and insulating material between the silicon fins and the one or more electrical conductors. The fin capacitors may also include insulating material between the one or more electrical conductors and underlying semiconductor material.