FinFET Fin-Cut Isolation Structure for Void-Free Trench Gap Fill
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Solution Overview
Problem
As the minimum feature sizes in semiconductor devices are reduced, issues such as seam and void formation in dielectric material within trenches, and shorting between contact plugs become significant challenges, affecting the integration density and performance of these devices.
Innovation Solution
The proposed solution involves a method for improving dielectric material gap-fill performance in trenches formed during the fin cut process. This is achieved by filling the trench with a first dielectric material, partially removing it to leave an upper portion unfilled, and then filling this upper portion with a second dielectric material. This approach reduces the aspect ratio of the unfilled trench portion, minimizing seam and void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the trench is completely filled with dielectric material in a single step, then the gap-fill performance is improved, but seam and void formation occurs due to high aspect ratio
Solution Approach 1:
The trench filling process is segmented into multiple steps: first filling the lower portion of the trench with dielectric material, then filling the upper portion separately. This segmentation reduces the aspect ratio during each filling step, preventing seam and void formation while achieving complete gap-fill performance.
2Productivity
If the minimum feature size is reduced to increase integration density, then more components can be integrated, but seam and void formation in dielectric material increases
Solution Approach 1:
By segmenting the trench filling into multiple deposition steps with intermediate removal or planarization, the process accommodates smaller feature sizes without causing seam and void formation, thereby enabling higher integration density while maintaining manufacturing precision.
3Reliability
If the trench aspect ratio is reduced by partial removal of dielectric material, then seam and void formation is minimized, but the filling process becomes more complex
Solution Approach 1:
The filling process is divided into discrete segments where dielectric material is deposited, partially removed or planarized, and then deposited again. This segmented approach reduces the effective aspect ratio during each deposition step, minimizing seam and void formation while managing process complexity through standardized repeated steps.
Data Source
AI summary
A semiconductor device a method of forming the same are provided. The semiconductor device includes a substrate, a first isolation structure and a second isolation structure over the substrate, a semiconductor fin over the substrate and between the first isolation structure and the second isolation structure, and a third isolation structure extending through the semiconductor fin and between the first isolation structure and the second isolation structure. A top surface of the semiconductor fin is above a top surface of the first isolation structure and a top surface of the second isolation structure. The third isolation structure includes a first dielectric material and a second dielectric material over the first dielectric material. An interface between the first dielectric material and the second dielectric material is below the top surface of the first isolation structure and the top surface of the second isolation structure.