FinFET Fin Height Uniformity via Epitaxial Prebake
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Solution Overview
Problem
The existing FinFET technology faces challenges with corner rounding and non-uniform fin heights due to trench reactive ion etching and epitaxial prebaking, leading to uneven SiGe fins that are not usable for advanced node devices like 10 nm and beyond.
Innovation Solution
The method involves forming blanket layers of semiconductor material on a substrate, patterning fins, depositing a dielectric material, masking one transistor region, removing fins to form trenches, and performing an epitaxial prebake process to round the bottom edges, resulting in fins with substantially uniform heights by eliminating the need for trench formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If trench reactive ion etching and epitaxial prebaking are used to form fins, then fins can be formed with doped portions, but corner rounding occurs and fin heights become non-uniform
Solution Approach 1:
The fin formation process is segmented into distinct stages: first forming blanket doped layers, then patterning fins, and finally performing selective epitaxial growth. This segmentation allows each stage to be optimized independently, preventing corner rounding while maintaining uniform fin heights.
Solution Approach 2:
Doped semiconductor layers are formed in advance as blanket layers before fin patterning. This preliminary action ensures that the doping profile is established uniformly across the substrate, and subsequent fin formation preserves this uniformity without causing corner rounding.
2Ease of manufacture
If fins are removed to form trenches and epitaxial growth is performed, then semiconductor layers can be grown in the trenches, but the process complexity increases
Solution Approach 1:
Instead of removing fins to form trenches and then growing epitaxial layers, the invention inverts the approach by first forming blanket doped layers and then selectively growing epitaxial silicon layers directly on the substrate in the desired fin regions. This eliminates the fin removal step and simplifies the overall process.
3Reliability
If uniform fin heights are achieved, then advanced node devices can be manufactured, but the manufacturing process becomes more restrictive
Solution Approach 1:
The invention controls fin height uniformity by precisely controlling epitaxial growth parameters (temperature, pressure, gas flow, growth time) rather than relying on trench depth control. This parameter-based approach achieves the required uniformity for advanced nodes while maintaining process flexibility through standard epitaxial equipment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates corner rounding issues and achieves uniform fin heights, enabling the close placement of Si and SiGe fins, which is essential for advanced node devices like SRAM and beyond.
Implementation Method 1
performing an epitaxial prebake process to round a bottom edge of the trench
Implementation Method 2
growing a first semiconductor layer in the trench where the first fin was removed; and growing a second semiconductor layer on the first semiconductor layer
Data Source
AI summary
A method of making a semiconductor device including forming a first blanket layer on a substrate; forming a second blanket layer on the first blanket layer; patterning a first fin of a first transistor region and a second fin of a second transistor region in the first blanket layer and the second blanket layer; depositing a mask on the second transistor region; removing the first fin to form a trench; growing a first semiconductor layer in the trench where the first fin was removed; and growing a second semiconductor layer on the first semiconductor layer.