FinFET Fin Isolation Regions for Density and Leakage Control

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Solution Overview

Problem

Conventional planar FETs face challenges such as sub-threshold swing degradation, significant drain-induced barrier lowering, and fluctuation of device characteristics when reduced in size, necessitating the development of more efficient semiconductor devices.

Innovation Solution

The implementation of Fin Field-Effect Transistors (FinFETs) with fin isolation regions that divide a single fin into multiple portions, allowing independent operation of devices in a smaller area, and the use of a gate-last or gate-first process to form the gate structure, along with specific materials and deposition techniques for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If planar FETs are reduced in size to increase device density, then device density improves, but sub-threshold swing degradation and drain-induced barrier lowering occur

Engineering Contradiction:
Improvedevice densityVSAvoiddevice characteristics stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from planar FETs to FinFETs by introducing a vertical fin structure that extends into the substrate. This dimensional change from 2D planar to 3D vertical architecture enables better gate control over the channel while maintaining reduced footprint, thereby improving device density without sacrificing reliability. The fin structure allows the gate to control current flow from three sides, mitigating short-channel effects even at scaled dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The fin structure is divided into multiple isolated portions by introducing fin isolation regions between adjacent fins. This segmentation prevents electrical interaction between neighboring fins, reducing leakage and improving device characteristics stability. The isolation regions effectively partition the continuous fin into discrete functional units, maintaining reliability while enabling higher density through closer spacing of isolated fins.

Inventive Principle:
Principle #1Segmentation

2Productivity

If planar FETs are reduced in size, then device density improves, but leakage increases

Engineering Contradiction:
Improvedevice densityVSAvoidleakage
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

By transitioning to vertical FinFET architecture, the gate achieves superior control over the channel in the vertical dimension, effectively suppressing off-state leakage that plagues scaled planar devices. The three-sided gate control in the vertical fin structure reduces drain-induced barrier lowering and improves sub-threshold swing, thereby reducing leakage while enabling higher density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The introduction of fin isolation regions between adjacent fins creates electrical isolation that prevents leakage paths between neighboring fins. This segmentation approach allows fins to be placed closer together for higher density while the isolation regions block parasitic leakage, solving the leakage problem that would otherwise limit density scaling.

Inventive Principle:
Principle #1Segmentation

3Productivity

If fin isolation regions are introduced to divide fins into multiple portions, then device density improves and substrate space is reduced, but process complexity increases

Engineering Contradiction:
Improvedevice densityVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The fin isolation formation process is merged with existing trench isolation processes used in standard CMOS fabrication. By utilizing the same trench isolation infrastructure and process steps, the fin isolation regions are created without requiring entirely new process equipment or methodologies. This merging approach reduces the incremental complexity burden despite the additional functionality provided by fin isolation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The fin isolation regions serve as intermediary structures that enable the division of fins into multiple isolated portions. These isolation regions act as mediators between the continuous fin structure and the desired discrete fin portions, allowing the fin to be segmented without requiring direct complex patterning of each fin portion. The intermediary isolation regions simplify the overall process by providing a straightforward method to achieve fin segmentation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9449971B2Methods of forming FinFETs
Publication Date: 2016.09.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9449971B2 patent drawing
  • US9449971B2 patent drawing
  • US9449971B2 patent drawing

AI summary

An embodiment is a method including forming a first fin on a substrate, the first fin having a first longitudinal axis, forming a first trench having a first width in the first fin, the first trench dividing the first fin into at least two fin portions, forming a first gate structure and first source/drain regions over one of the at least two fin portions of the first fin, and forming a second gate structure and second source/drain regions over another of the at least two fin portions of the first fin.