FinFET Fin Protection Layer for Surface Roughness Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing FinFET devices face challenges in maintaining the integrity of the fin structure during fabrication processes, leading to defects and dangling bonds that reduce electron mobility and increase leakage current due to surface roughness and damage from etching and polishing steps.
Innovation Solution
A protection layer made of silicon-containing compounds, such as silicon oxide or silicon oxynitride, is conformally deposited on the fin structure to repair defects and dangling bonds, improving the interface roughness to within 0.1 nm to 2.0 nm, thereby enhancing electron mobility and protecting the fin from subsequent processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching and polishing steps are used to fabricate the FinFET device, then manufacturing precision is improved, but the fin structure integrity deteriorates due to surface roughness and damage
Solution Approach 1:
A protection layer is deposited on the fin structure before subsequent fabrication steps, proactively protecting the fin surface from damage during etching and polishing operations. This preliminary protective measure prevents surface roughness and defects before they can occur.
Solution Approach 2:
The protection layer acts as an intermediary between the fin structure and the fabrication processes. It serves as a buffer that absorbs mechanical stress and prevents direct contact between harsh etching/polishing tools and the fin surface, thereby maintaining fin integrity while allowing precise fabrication.
2Ease of manufacture
If the fin structure is exposed during fabrication, then ease of manufacture is improved, but electron mobility deteriorates due to defects and dangling bonds
Solution Approach 1:
The protection layer serves as an intermediary that allows fabrication processes to proceed easily while simultaneously protecting the fin structure from acquiring defects. It enables manufacturers to work with exposed fin structures without compromising electron mobility.
Solution Approach 2:
The protection layer is a sacrificial, temporary structure that is deposited, serves its protective function during fabrication, and is later removed. This disposable layer absorbs the damage that would otherwise permanently harm the fin structure, enabling easy manufacturing while preserving electron mobility.
3Device complexity
If no protection layer is used, then device complexity is reduced, but leakage current increases due to surface damage
Solution Approach 1:
The protection layer acts as a mediator that blocks the generation of surface defects during fabrication. By preventing dangling bonds and surface damage, it eliminates the source of leakage current while adding minimal structural complexity.
Solution Approach 2:
The protection layer converts the potentially harmful exposure of the fin structure during fabrication into a beneficial outcome. By deliberately adding this temporary layer, the process actually reduces overall device complexity by preventing the formation of defect states that would require complex remediation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The protection layer effectively repairs defects and reduces surface roughness, improving electron mobility and device performance by preventing electron capture and leakage current, thus enhancing the overall performance of the FinFET device.
Implementation Method 1
A protection layer made of silicon-containing compounds, such as silicon oxide or silicon oxynitride, is conformally deposited on the fin structure to repair defects and dangling bonds
Data Source
AI summary
A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an isolation structure formed on the substrate. The fin structure has a top portion and a bottom portion, and the bottom portion is embedded in the isolation structure. The FinFET device structure further includes a protection layer formed on the top portion of the fin structure. An interface is between the protection layer and the top portion of the fin structure, and the interface has a roughness in a range from about 0.1 nm to about 2.0 nm.


