FINFET Transistor Fin Reconfiguration via Controllable Interconnect
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Solution Overview
Problem
The fabrication of complex integrated circuits using FINFET transistors with non-planar channel architectures faces challenges in achieving reliable manufacturing processes with high production yield due to the complexity of interdependencies in manufacturing steps and the difficulty in producing different types of transistor elements with varying current drive capabilities required for diverse circuit applications.
Innovation Solution
The solution involves configuring semiconductor devices with individually accessible semiconductor fins and a controllable interconnect structure that allows for adjusting the transistor configuration after fabrication, enabling the connection of fins to drain or source terminals based on desired settings and replacing defective fins with redundant ones, thereby enhancing production yield and flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standard FINFET transistor cells are fabricated with fixed configuration, then manufacturing process complexity is reduced, but adaptability to different circuit requirements is worsened
Solution Approach 1:
The patent implements a controllable interconnect structure that allows the connection configuration of semiconductor fins to be dynamically adjusted after fabrication. Switching elements enable the interconnect structure to change connection states between fins and transistor terminals (drain/source), transforming a static transistor configuration into a dynamic one that can be reconfigured based on circuit requirements while maintaining the same physical transistor cell structure.
2Productivity
If individual fin connections are fixed during fabrication, then production yield is reduced due to defective fins, but manufacturing complexity is worsened by adding reconfiguration capabilities
Solution Approach 1:
The patent incorporates redundant semiconductor fins and a controllable interconnect structure during the initial fabrication process. This preliminary action ensures that even if some fins are defective, the transistor can be reconfigured to use only functional fins. The switching elements are pre-positioned to enable future reconfiguration, allowing defective fins to be identified and bypassed without requiring complex post-fabrication modifications.
Solution Approach 2:
The patent enables the discarding of defective semiconductor fins by using switching elements to disconnect them from the transistor terminals. The controllable interconnect structure allows defective fins to be identified, isolated, and discarded from the functional circuit while recovering the transistor's operational capability through reconfiguration of the remaining healthy fins.
3Adaptability or versatility
If transistor configuration is adjusted after fabrication, then adaptability to circuit requirements is improved, but manufacturing process complexity is worsened
Solution Approach 1:
The patent designs a universal transistor cell structure with redundant fins and a controllable interconnect structure that can serve multiple circuit requirements. The same physical transistor cell can be reconfigured to provide different current drive capabilities by adjusting the connection states of the switching elements, eliminating the need to fabricate different transistor types for different circuit applications.
Data Source
AI summary
In a sophisticated semiconductor device, FINFET elements may be provided with individually accessible semiconductor fins which may be connected to a controllable interconnect structure for appropriately adjusting the transistor configuration, for instance with respect to current drive capability, replacing defective semiconductor fins and the like. Consequently, different transistor configurations may be obtained on the basis of a standard transistor cell architecture, which may result in increased production yield of highly complex manufacturing strategies in forming non-planar transistor devices.