FinFET Fin Surface Roughness Reduction via Crystal Orientation

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Solution Overview

Problem

Conventional methods for forming fin-shaped channels in FinFET devices face challenges due to surface roughness affecting the electrical properties of high k-metal gate structures, particularly as feature sizes shrink, leading to decreased performance and increased complexity in semiconductor manufacturing.

Innovation Solution

A method involving ion implantation to create implanted regions on a semiconductor substrate, followed by epitaxial growth of fins between these regions, and the formation of an insulating structure to reduce surface roughness, allowing for a surface orientation that minimizes disruptions to the metal gate work function and enhances electrical properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching methods are used to form fin-shaped channels, then the fin structure can be created, but the surface roughness of the fin increases which degrades the electrical properties of the high k-metal gate structure

Engineering Contradiction:
Improvefin surface roughnessVSAvoidelectrical properties of high k-metal gate structure
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the crystallographic orientation parameter of the fin surface from conventional <100> to <110>, which fundamentally alters the surface atomic arrangement and reduces surface roughness. This parameter change in crystal orientation directly addresses both the surface roughness issue and the electrical property degradation of the metal gate structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of trying to reduce surface roughness through post-etching processing steps, the patent inverts the approach by selecting a different crystal orientation that inherently provides smoother surfaces. This reverses the conventional wisdom that etching must be followed by extensive surface planarization.

Inventive Principle:
Principle #13The other way round (Inversion)

2Productivity

If feature sizes are shrunk to increase transistor density, then more devices can be packed, but the surface roughness effect becomes more pronounced leading to decreased electrical performance

Engineering Contradiction:
Improvetransistor densityVSAvoidelectrical properties
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By changing the fin crystal orientation to <110>, the patent enables continued scaling to smaller feature sizes while maintaining smooth surfaces. The new orientation provides inherent surface smoothness that counteracts the increased surface area effects that occur during scaling, allowing higher transistor density without sacrificing electrical performance.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional fin formation processes are used, then the process is well-established, but the metal gate work function changes due to surface roughness causing performance degradation

Engineering Contradiction:
Improveprocess establishmentVSAvoidmetal gate work function stability
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent modifies the crystal orientation parameter to <110> which provides inherent surface smoothness, thereby stabilizing the metal gate work function. This parameter change maintains compatibility with existing manufacturing processes while improving the critical work function stability issue.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach results in a FinFET device with reduced surface roughness and improved electrical properties, ensuring stable performance and manufacturing efficiency by maintaining the integrity of the metal gate work function and enhancing transistor density.

Implementation Method 1

performing an ion implantation on the semiconductor substrate using the patterned photoresist as a mask

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

epitaxial growth of fins between these regions

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9184291B2FinFET device and method of forming fin in the same
Publication Date: 2015.11.10 SEMICON MFG INT (BEIJING) CORP
  • US9184291B2 patent drawing
  • US9184291B2 patent drawing
  • US9184291B2 patent drawing

AI summary

A method for manufacturing a fin for a FinFET device includes providing a semiconductor substrate, forming a plurality of implanted regions in the semiconductor substrate, and epitaxially forming fins between two adjacent implanted regions. The method also includes forming an insulating structure between two adjacent fins.