FinFET Fin Trimming Sequence for Short-Channel Control
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Solution Overview
Problem
As semiconductor devices continue to integrate more components into smaller areas, challenges such as the short channel effect (SCE) and current crowding arise, which affect the performance of FinFETs, particularly in direct current and ring oscillator applications.
Innovation Solution
The fin trim process is delayed until after the source/drain regions are formed, allowing for a greater fin surface area during epitaxial growth and reducing the vertical distance between channel and source/drain regions, thereby enhancing gate control and reducing SCE and current crowding effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the fin trim process is performed before source/drain region formation, then the gate control is improved, but the epitaxial source/drain region volume is reduced and defect density increases
Solution Approach 1:
The fin trim process is delayed until after source/drain region formation rather than being performed beforehand. This reversal of the conventional sequence allows the epitaxial growth to occur on the full fin surface area, maximizing the source/drain region volume while maintaining gate control through subsequent trimming of the exposed fin portions.
2Quantity of substance
If the fin trim process is delayed until after source/drain region formation, then the epitaxial source/drain region volume is increased, but the vertical distance between channel and source/drain regions increases
Solution Approach 1:
The fin structure is trimmed locally after epitaxial growth to reduce the vertical distance between the channel and source/drain regions. This localized trimming approach maintains the increased source/drain volume while correcting the excessive vertical spacing in specific areas where it would harm device performance.
3Productivity
If the minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but the short channel effect and current crowding worsen
Solution Approach 1:
The process sequence parameter is changed by delaying the fin trim operation until after epitaxial source/drain region formation. This parameter change in the manufacturing process allows for increased source/drain region volume that compensates for the short channel effects, enabling continued scaling to higher integration densities while maintaining device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the performance of FinFETs by increasing the volume of epitaxial source/drain regions formed with fewer defects, reducing SCE, and minimizing current crowding, especially in direct current and ring oscillator applications.
Implementation Method 1
growing an epitaxial source/drain in the fin adjacent the channel region
Data Source
AI summary
In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.


