FinFET Fin Structure Layout to Limit Well Interdiffusion

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Solution Overview

Problem

As semiconductor devices shrink to smaller sizes, the resistance of FinFETs increases due to interdiffusion between well regions of different conductivity types, affecting electrical performance.

Innovation Solution

The semiconductor device structure includes fin structures with specific spacing and width ratios to prevent interdiffusion, maintaining electrical performance by optimizing fin geometry and spacing to reduce dopant depletion and resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fin size and fin-to-fin space are reduced to increase device density, then functional density is improved, but resistance of the well pick-up region increases due to interdiffusion between well regions of different conductivity types

Engineering Contradiction:

Improvedevice densityVSAvoidelectrical performance

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The pick-up well region is segmented into multiple independently doped regions (first pick-up well region with first conductivity type, second pick-up well region with second conductivity type, third pick-up well region with first conductivity type) separated by fin structures. This segmentation prevents interdiffusion between opposite conductivity types while maintaining high device density through optimized fin spacing and dimensions.

Inventive Principle:

Principle #1Segmentation

2Productivity

If fin width is reduced to increase device density, then functional density is improved, but resistance increases due to interdiffusion effects

Engineering Contradiction:

Improvedevice densityVSAvoidfin dimension control

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

Different fin structures are provided with different widths tailored to their specific locations and functional requirements. First fin structures have a first width, second fin structures have a second width, and third fin structures have a third width. This local quality approach allows optimization of each fin region to prevent interdiffusion while maintaining high overall device density.

Inventive Principle:

Principle #3Local quality

3Productivity

If fin-to-fin space is reduced to increase device density, then functional density is improved, but interdiffusion between well regions increases

Engineering Contradiction:

Improvedevice densityVSAvoidinterdiffusion

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

Fin structures act as intermediary physical barriers between pick-up well regions of opposite conductivity types. These fin structures prevent direct interdiffusion between adjacent well regions while allowing the fin-to-fin space to be minimized for high device density. The intermediary fins maintain electrical isolation between opposite conductivity types.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12057505B2Semiconductor device having fin structures

Publication Date: 2024.08.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first well region and a second well region and a first fin structure formed in a first region of the first well region. The semiconductor device structure also includes a second fin structure formed in a second region of the first well region. In addition, the second fin structure is narrower than the first fin structure. The semiconductor device structure also includes a third fin structure formed in a first region of the second well region. In addition, a sidewall of the first fin structure is substantially aligned with a sidewall of the third fin structure.