FinFET Fin Layout Using Flat Recess Sides for Rectangular PODE
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Solution Overview
Problem
The manufacturing process of fin field-effect transistors (FINFETs) faces yield reduction due to damage of fins during the formation of L-shaped PODE structures, which are used to support and protect the fins during the manufacturing process.
Innovation Solution
The layout design includes a configuration where the side area facing the recess is substantially flat, allowing the formation of rectangle-shaped PODE structures instead of L-shaped ones, preventing fin damage and improving manufacturing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If L-shaped PODE structures are formed to support and protect fins, then fin protection is improved, but fin damage occurs during manufacturing
Solution Approach 1:
The patent extracts and removes the L-shaped PODE structure that causes fin damage, replacing it with a rectangle-shaped PODE structure that provides protection without the harmful L-shaped configuration. This extraction of the problematic geometric feature resolves the contradiction between providing fin protection and preventing fin damage.
Solution Approach 2:
The patent inverts the conventional L-shaped PODE structure design by using a rectangle-shaped PODE structure instead. This inversion changes the geometric configuration from L-shaped to rectangular, which eliminates the fin damage issue while maintaining the protective function.
2Strength
If L-shaped PODE structures are used, then structural support is provided, but manufacturing yield is reduced
Solution Approach 1:
The harmful L-shaped configuration is extracted and removed from the PODE structure design. By eliminating the L-shaped geometry that causes fin damage, the patent improves manufacturing yield while maintaining the necessary structural support through the rectangle-shaped alternative.
Solution Approach 2:
The patent converts the harmful effect of the L-shaped PODE structure (which causes fin damage and reduces yield) into a benefit by replacing it with a rectangle-shaped structure. This transformation turns the design challenge into an opportunity to improve both structural support and manufacturing yield simultaneously.
3Ease of manufacture
If side area facing recess is made substantially flat, then rectangle-shaped PODE structures can be formed, but layout complexity increases
Solution Approach 1:
The patent applies local quality by making only the side area facing the recess substantially flat, rather than making the entire layout complex. This localized flatness is sufficient to enable rectangle-shaped PODE structure formation while minimizing the overall layout complexity increase.
Data Source
AI summary
A semiconductor device includes a first fin, a first continuous fin and continuous gates. The first fin is formed on a substrate, and includes first and second portions that are spaced apart by a first recess. A side of the first portion and a side of the second portion are located at two sides of the first recess, respectively. The first continuous fin is formed on the substrate, and extends along the first portion, the first recess and the second portion. The continuous gates are formed on the substrate, and arranged to intersect the first continuous fin and the first fin in a layout view. A first number of the continuous gates are disposed across the first recess and each of the first number of the continuous gates is disposed between the two sides of the first recess in a layout view. A method is also disclosed herein.