3D FinFET Transistor with Forked Channel Region
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Solution Overview
Problem
Current semiconductor fabrication techniques face challenges in scaling down while maintaining performance, particularly for 3-dimensional fin-type transistors, as they struggle to achieve both smaller footprints and improved performance.
Innovation Solution
A method is developed for forming semiconductor fins with a forked cross-sectional channel region by removing the center portion of the channel region, using a process that involves forming U-shaped hard mask members, filling them with material, and then selectively removing portions to create a forked shape, which allows for improved fin formation and isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional planar CMOS technology is used, then manufacturing is simpler, but device footprint is larger and performance is limited
Solution Approach 1:
The channel region is segmented into two separate channel portions by removing the center portion, creating a forked structure. This segmentation increases the effective channel width and improves device performance while maintaining a compact footprint, directly addressing the contradiction between performance and complexity.
Solution Approach 2:
The invention transitions from a conventional planar 2D channel structure to a 3D forked channel structure by removing the center portion of the channel region. This dimensional change allows the channel to extend in multiple directions, increasing the effective channel area without proportionally increasing the device footprint, thus improving performance while managing complexity.
2Reliability
If the channel region is modified to improve performance, then electrical characteristics are enhanced, but manufacturing precision requirements increase
Solution Approach 1:
A sacrificial mandrel structure is introduced as an intermediary element to define the region that will be removed from the channel. The mandrel serves as a precise template that guides the removal process, ensuring accurate formation of the forked channel structure while maintaining manufacturing feasibility. This intermediary approach balances the need for precise channel modification with practical manufacturing constraints.
3Productivity
If fin channel is removed to create forked shape, then device footprint is reduced and performance is improved, but structural integrity challenges arise
Solution Approach 1:
The fin channel is segmented into two separate channel portions connected through the source and drain regions. This segmentation creates the forked shape that reduces device footprint while maintaining structural integrity through the connecting regions, effectively resolving the contradiction between footprint reduction and structural strength.
Solution Approach 2:
The channel removal is applied locally to specific regions (the center portion) while preserving the overall fin structure and its connection to substrate. This localized modification achieves footprint reduction and performance improvement without compromising the global structural integrity of the fin, addressing the strength concern while maintaining the desired geometric changes.
Data Source
AI summary
A three-dimensional transistor includes a channel with a center portion (forked channel) or side portions (narrow channel) removed, or fins without shaping, after removal of the dummy gate and before a replacement metal gate is formed.


