FinFET Gate Capping Scheme With Shield Layer for TiN Protection
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Solution Overview
Problem
The formation of a fluorinated silicon cap in FinFETs is not compatible with TiN films due to etching and TiN loss, requiring a more robust capping film scheme to protect TiN from fluorine damage and oxidation, while maintaining device performance and reliability.
Innovation Solution
A thin protective shield layer is used to form a bilayer capping scheme for TiN, enabling the use of a fluorinated silicon cap, which protects the dielectric capping film from F damage, prevents metal diffusion into the gate dielectric, and reduces interfacial layer regrowth, thereby boosting PMOS Vt and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a fluorinated silicon cap is used to protect TiN from oxidation, then oxidation resistance is improved, but TiN film suffers from etching damage and TiN loss
Solution Approach 1:
The capping structure is segmented into multiple layers: a fluorinated silicon cap layer for oxidation protection, a TiN layer for electrical functionality, and a silicon nitride barrier layer to prevent fluorine damage. This segmentation allows each layer to perform its specific function without compromising the others.
Solution Approach 2:
A silicon nitride barrier layer is introduced as an intermediary between the fluorinated silicon cap and the TiN film. This intermediary layer blocks fluorine from reaching the TiN film, preventing etching damage while allowing the fluorinated cap to provide oxidation protection.
2Reliability
If a protective capping film is formed to protect TiN from fluorine damage, then TiN film integrity is improved, but process complexity increases
Solution Approach 1:
The protective capping structure is divided into functionally distinct layers: fluorinated silicon for oxidation protection and silicon nitride for fluorine barrier protection. This segmentation enables each layer to be optimized for its specific protective function.
Solution Approach 2:
The capping structure uses composite material architecture combining fluorinated silicon and silicon nitride layers. This composite approach provides dual protection functionality (oxidation and fluorine resistance) while maintaining process compatibility with existing semiconductor manufacturing.
3Reliability
If TiN is used as a dielectric capping film, then electrical performance is improved, but TiN is susceptible to fluorine etching and oxidation
Solution Approach 1:
A silicon nitride barrier layer is placed between the TiN film and the fluorinated silicon cap, acting as an intermediary that blocks fluorine from attacking the TiN film, thereby preserving TiN integrity and electrical performance.
Solution Approach 2:
The protective structure is segmented into distinct functional layers, with the TiN layer dedicated to electrical performance and the outer fluorinated silicon layer dedicated to oxidation protection, eliminating the need for TiN to perform both functions simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The shield layer effectively shields the TiN film from fluorine and oxidation, allowing for improved PMOS Vt, reduced leakage current, and enhanced device reliability, while maintaining the effectiveness of the fluorinated silicon cap in boosting device performance and speed.
Implementation Method 1
A thin protective shield layer is used to form a bilayer capping scheme for TiN, enabling the use of a fluorinated silicon cap, which protects the dielectric capping film from F damage
Implementation Method 2
prevents metal diffusion into the gate dielectric
Implementation Method 3
a first annealing operation is performed after the capping layer is formed
Data Source
AI summary
In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a shield layer is formed over the first conductive layer forming a bilayer structure, a capping layer is formed over the shield layer, a first annealing operation is performed after the capping layer is formed, the capping layer is removed after the first annealing operation, and a gate electrode layer is formed after the capping layer is removed.


