FinFET Gate Contact Structure With Sacrificial Etch Protection
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Solution Overview
Problem
As semiconductor devices approach smaller feature sizes, challenges arise in integrating more components into a given area while maintaining process efficiency and reducing etch loss and damage during manufacturing, particularly in forming gate stacks and contact openings.
Innovation Solution
The use of self-aligned contact materials and sacrificial layers with high etch selectivity, such as zirconium oxide, to protect the gate structure during etching and reduce etch loss, combined with a helmet material to enhance etch selectivity and prevent damage, allows for precise control of gate height and aspect ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but etch loss and damage during manufacturing increases
Solution Approach 1:
A sacrificial layer is introduced as an intermediary material between the gate structure and the etching process. This sacrificial layer (comprising materials such as silicon oxide, silicon nitride, or silicon oxynitride) protects the underlying gate structure from etch damage while enabling precise formation of contact openings. The sacrificial layer is temporarily present during manufacturing and is subsequently removed after serving its protective function.
Solution Approach 2:
The sacrificial layer is formed in advance before the critical etching steps. By depositing the sacrificial layer over the gate structure prior to contact opening formation, the structure is pre-protected against etch loss and damage. This preliminary protective action enables subsequent etching processes to proceed with greater margin and control.
2Manufacturing precision
If self-aligned contact materials and sacrificial layers with high etch selectivity are used to protect the gate structure, then etch loss is reduced, but device complexity increases
Solution Approach 1:
The sacrificial layer serves multiple functions simultaneously: it protects the gate structure from etch damage, defines the contact opening locations through self-alignment, and provides etch selectivity references for subsequent processing steps. This multi-functionality reduces the need for additional separate protective structures, thereby limiting the increase in complexity.
Solution Approach 2:
The invention utilizes etch selectivity parameters by choosing sacrificial layer materials (such as silicon oxide, silicon nitride, or silicon oxynitride) that exhibit high selectivity ratios relative to the gate structure materials. This parameter optimization enables precise control of etch depth and protection without requiring excessive structural complexity.
3Manufacturing precision
If sacrificial layers with high etch selectivity are used, then etch process window control is enhanced, but manufacturing steps increase
Solution Approach 1:
The formation of the sacrificial layer is merged with the existing gate structure fabrication process flow. The sacrificial layer deposition is integrated into the sequence of gate electrode and dielectric layer formations, allowing the protective function to be achieved without adding significant manufacturing steps beyond the standard process flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances etch process window control, reduces etch residues, and improves yield by minimizing lateral damage and poly line collapsing, while allowing for a more robust etching process with wider condition control.
Implementation Method 1
forming a first sacrificial material over the first gate stack and the second gate stack, wherein the first sacrificial material has an etch selectivity to the gate spacers of greater than about 12
Implementation Method 2
combined with a helmet material to enhance etch selectivity and prevent damage
Data Source
AI summary
A semiconductor device such as a fin field effect transistor and its method of manufacture are provided. In some embodiments gate spacers are formed over a semiconductor fin, and a first gate stack is formed over the fin. A first sacrificial material with a large selectivity to the gate spacers is formed over the gate stack, and a second sacrificial material with a large selectivity is formed over a source/drain contact plug. Etching processes are utilized to form openings through the first sacrificial material and through the second sacrificial material, and the openings are filled with a conductive material.


