FinFET Gate Dielectric Fluorine Diffusion Against Oxidation

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Solution Overview

Problem

The challenge in semiconductor manufacturing lies in forming reliable semiconductor devices at increasingly smaller sizes due to the difficulty in maintaining the integrity of gate dielectric layers and fin structures as feature sizes decrease, leading to issues with oxidation and reliability.

Innovation Solution

The solution involves forming a semiconductor device structure with a gate dielectric layer that includes fluorine, where the gate electrode layer is annealed to diffuse fluorine into the gate dielectric layer, improving its stability and reliability, and using a semiconductor oxynitride layer to prevent oxidation, along with a spacer layer and stressors to enhance the fin structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then productivity and production efficiency are improved, but manufacturing precision and reliability of gate dielectric layers deteriorate

Engineering Contradiction:
Improveproduction efficiencyVSAvoidintegrity of gate dielectric layer
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces fluorine doping into the gate dielectric layer to fundamentally change its material properties. This parameter change enables the dielectric layer to maintain its integrity and prevent oxidation even at reduced feature sizes, thus resolving the contradiction between scaling down for productivity and maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gate dielectric layer is formed as a composite structure containing silicon oxide and fluorine. This composite material approach enhances the dielectric properties and oxidation resistance, allowing reliable device formation at smaller dimensions while maintaining manufacturing precision.

Inventive Principle:
Principle #40Composite materials

2Productivity

If feature sizes decrease to increase functional density, then productivity is improved, but reliability of semiconductor devices deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidreliability of gate dielectric layer
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Fluorine doping fundamentally changes the chemical and physical parameters of the gate dielectric layer, enhancing its stability and resistance to oxidation. This parameter modification ensures reliable device operation even as feature sizes are reduced to increase functional density.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The fluorine doping is performed in advance during the gate dielectric layer formation process, preparing the material with enhanced properties before the device is subjected to subsequent processing and operation. This preliminary action ensures reliability is built into the structure from the outset.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conventional gate dielectric layers are used at smaller sizes, then manufacturing is simpler, but oxidation and reliability issues worsen

Engineering Contradiction:
Improveease of forming gate dielectric layerVSAvoidoxidation of gate dielectric layer
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

By modifying the gate dielectric layer with fluorine doping, the material's resistance to oxidation is fundamentally enhanced. This parameter change addresses the harmful oxidation effect while maintaining a relatively straightforward manufacturing process, thus resolving the contradiction between ease of manufacture and resistance to harmful factors.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the stability and reliability of the gate dielectric layer and fin structures, allowing for reduced feature sizes while maintaining acceptable dielectric properties, thus facilitating the formation of reliable semiconductor devices.

Implementation Method 1

the gate electrode layer is annealed to diffuse fluorine into the gate dielectric layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

using a semiconductor oxynitride layer to prevent oxidation

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Data Source

PatentUS20240395564A1Semiconductor device structure having gate dielectric layer
Publication Date: 2024.11.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240395564A1 patent drawing
  • US20240395564A1 patent drawing
  • US20240395564A1 patent drawing

AI summary

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The isolation layer includes fluorine, and a first concentration of fluorine in the isolation layer increases toward a top surface of the isolation layer. The semiconductor device structure includes a gate stack over the isolation layer and wrapping around the fin portion.