FinFET Gate Etching and Protruding Isolation for Low Leakage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor IC fabrication, particularly for FinFETs, the scaling down of IC features leads to challenges in removing resist material between gate structures, resulting in residual curvy sidewalls that affect fin height uniformity and device performance, especially at advanced process nodes.
Innovation Solution
A method involving multiple etching steps with varying etching rates and directivities is employed to remove the resist material, ensuring complete removal without damaging gate structures, and forming a protruding isolation feature across the boundary line between FinFET regions to enhance isolation and leakage performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If single-step etching is used to remove resist material, then process simplicity is maintained, but resist material cannot be completely removed and curvy sidewalls form
Solution Approach 1:
The etching process is divided into multiple sequential steps with different etching rates and directivities. The first etching step uses a first etching rate to remove resist material, and the second etching step uses a second etching rate to complete removal. This segmentation allows complete resist removal while maintaining process control and avoiding curvy sidewall formation.
2Manufacturing precision
If high etching directivity is used to remove resist material, then complete removal is achieved, but gate structures may be damaged
Solution Approach 1:
The etching process is segmented into two steps with different directivity levels. The first etching step uses moderate directivity to remove most resist material without damaging gate structures. The second etching step uses higher directivity to complete the removal of remaining resist material. This segmentation achieves complete resist removal while protecting gate structures from damage.
3Ease of manufacture
If resist material is not completely removed, then process simplicity is maintained, but fin height uniformity deteriorates
Solution Approach 1:
The etching process is divided into multiple steps to ensure complete resist material removal, which is critical for achieving uniform fin heights. The first etching step removes the majority of resist material, and the second etching step removes the remaining material that would otherwise cause fin height variations. This segmented approach maintains manufacturing precision while being integrated into the existing fabrication process.
4Ease of manufacture
If conventional isolation structure is used, then fabrication simplicity is maintained, but leakage performance is insufficient
Solution Approach 1:
The isolation feature is formed to protrude above the boundary line between FinFET regions before the FinFET structures are fully formed. This preliminary formation of the protruding isolation feature creates enhanced isolation between n-type and p-type regions, preventing leakage currents. The protruding structure is then integrated with the FinFET fabrication process, maintaining ease of manufacture while improving leakage performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases fin height uniformity and improves device leakage performance by effectively removing resist material and creating a protruding isolation feature, which can be integrated into existing semiconductor fabrication processes.
Implementation Method 1
performing a first etching process to recess the resist layer below a top surface of the gate structure; performing a second etching process to further recess the resist layer
Implementation Method 2
forming an epitaxial source/drain (S/D) feature above the fin
Data Source
AI summary
A semiconductor device includes a substrate having a first region and a second region of opposite conductivity types, an isolation feature over the substrate, a first fin protruding from the substrate and through the isolation feature in the first region, a first epitaxial feature over the first fin, a second fin protruding from the substrate and through the isolation feature in the second region, and a second epitaxial feature over the second fin. A portion of the isolation feature located between the first fin and the second fin protrudes from a top surface of the isolation feature.