FinFET Gate Fill Deposition for Gap-Filling and Low Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in achieving optimal gap-filling and low resistance in the deposition of conductive materials for gate electrodes in FinFETs, particularly due to the limitations of existing deposition processes which often result in defects and performance issues.

Innovation Solution

An alternating cyclical atomic layer deposition (ALD) process is employed, alternating between cycles using tungsten and boron process gases to form a smoother surface for better gap-filling and cycles using tungsten and silicon process gases to achieve lower resistance, thereby improving device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional deposition processes are used for gate electrode fill material, then the deposition process is simple, but the gap-filling capability is poor and resistance is high

Engineering Contradiction:
Improvegap-filling capabilityVSAvoiddeposition process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The deposition process is segmented into multiple alternating cycles (first ALD cycle with tungsten-boron, second ALD cycle with tungsten-silicon) rather than using a single conventional deposition step. Each cycle targets specific properties: the first cycle improves gap-filling capability by forming a smoother surface, while the second cycle reduces resistance by promoting larger tungsten grain sizes. This segmentation allows simultaneous optimization of multiple conflicting properties.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the chemical composition parameters of the depositing material by alternately introducing boron and silicon elements during the ALD cycles. These parameter changes in material composition directly affect the physical properties of the fill material: boron enhances surface smoothness for better gap-filling, while silicon promotes grain growth for lower resistance, thereby resolving the contradiction between gap-filling capability and resistance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional deposition processes are used for gate electrode fill material, then the process is easy to implement, but resistance remains high

Engineering Contradiction:
Improveelectrical conductivityVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The manufacturing process is divided into segmented ALD cycles with different chemical compositions (tungsten-boron followed by tungsten-silicon) to sequentially achieve different objectives: first improving surface morphology for gap-filling, then optimizing electrical properties for low resistance. This segmented approach makes the complex goal of achieving both good gap-filling and low resistance manageable through systematic, repeatable cycles.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fill material is formed as a composite structure through alternating deposition cycles that incorporate multiple elements (tungsten, boron, silicon). The resulting composite fill material combines the benefits of each element: tungsten provides the base conductive structure, boron enhances surface smoothness, and silicon promotes grain growth, collectively achieving both excellent gap-filling capability and low resistance that pure tungsten cannot provide alone.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the gap-filling capability and reduces resistance of the gate electrode, leading to improved performance and reliability of FinFETs by forming a conductive fill material with a smoother surface and larger tungsten metal grain sizes.

Implementation Method 1

An alternating cyclical atomic layer deposition (ALD) process is employed, alternating between cycles using tungsten and boron process gases to form a smoother surface for better gap-filling and cycles using tungsten and silicon process gases to achieve lower resistance

Methodology Applied
Scientific EffectAtomic Layer Deposition: Chemical Vapour Deposition

Data Source

PatentUS20240395554A1Conductive Features of Semiconductor Devices and Methods of Forming the Same
Publication Date: 2024.11.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240395554A1 patent drawing
  • US20240395554A1 patent drawing
  • US20240395554A1 patent drawing

AI summary

A method of forming a semiconductor device includes forming a first layer over a substrate in a deposition chamber with a first deposition cycle and forming a second layer over the substrate in the deposition chamber with a second deposition cycle. The first deposition cycle includes flowing a first process gas over the substrate and flowing a second process gas over the substrate. The second deposition cycle includes flowing a third process gas over the substrate and flowing a fourth process gas over the substrate.