FinFET Fin Top Structure for Gate Gap Filling and Short-Channel Control

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Solution Overview

Problem

Existing FinFET devices face challenges in achieving optimal gate structure formation due to limitations in fin structure geometry and process window, leading to difficulties in filling the space between adjacent fin structures and potential short channel effects.

Innovation Solution

The method involves forming a fin top layer over the fin structures in both core and I/O regions, trimming the fin structures after removing the dummy gate structure to enlarge the space between them, and using this approach to improve the process window for gate structure formation by ensuring appropriate fin width and height for effective gate material filling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fin structures are formed with standard geometry, then device density is maintained, but gate structure formation becomes difficult and short channel effects occur

Engineering Contradiction:
Improvegate structure formation reliabilityVSAvoidshort channel effects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating non-unfin structures with varying geometries in different regions. Specifically, some fins are formed with different heights, widths, or spacing compared to traditional uniform fin structures. This allows optimization of gate material filling in specific areas while maintaining overall device performance, directly addressing the difficulty of gate structure formation and reducing short channel effects in critical regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs preliminary action by forming mandrel structures and sacrificial layers before the final fin structure creation. These preliminary structures guide the formation of non-unfin geometries and ensure proper spacing and dimensions are achieved before gate material deposition, preventing formation issues before they occur.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If fin structures are trimmed to enlarge space between them, then gate material filling is improved, but fin structure geometry control becomes more challenging

Engineering Contradiction:
Improvegate material filling processVSAvoidfin width and height control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent uses preliminary mandrel structures and sacrificial layers to pre-establish the desired fin spacing and geometry before trimming operations. This preliminary framework guides subsequent trimming processes, ensuring that fin structures are removed or modified in a controlled manner that maintains manufacturing precision while achieving the necessary space enlargement for gate material filling.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediary structures such as mandrels and sacrificial layers that mediate between the initial fin formation and the final trimmed geometry. These intermediary elements serve as templates that control the trimming process, allowing precise adjustment of fin dimensions and spacing without directly compromising manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If non-unfin structures are formed, then device performance is improved, but fabrication process complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the fin structure formation into distinct stages using separate mandrel structures and sacrificial layers for different fin regions. This allows independent optimization of various fin geometries without requiring complete process redesign, managing fabrication complexity through modular approach while achieving improved device performance through non-unfin structures.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12148815B2Fin field effect transistor device structure
Publication Date: 2024.11.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12148815B2 patent drawing
  • US12148815B2 patent drawing
  • US12148815B2 patent drawing

AI summary

A fin field effect transistor device structure includes a substrate, an isolation structure, a first fin structure, a fin top layer, a first oxide layer, and a first gate structure. The first fin structure is disposed in the substrate and includes a base portion, a top portion, and a joint portion. The base portion is surrounded by the isolation structure. The top portion is exposed from the isolation structure. The joint portion connects the top portion and the base portion. The fin top layer is disposed over the top portion of the first fin structure. The fin top layer and the top portion of the first fin structure are made of different materials. The first oxide layer covers the fin top layer, the first fin structure, and the isolation structure. The first gate structure is disposed over the first oxide layer.