FinFET Gate Structure Integration via Single Sidewall Image Transfer

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Solution Overview

Problem

Conventional finFET manufacturing processes face challenges such as gate pitch variation, fin erosion, and the formation of epitaxial nodules due to multiple etch steps and dummy gate removal, leading to defects in source and drain regions.

Innovation Solution

A method involving a single sidewall image transfer technique using a sacrificial structure with a mandrel and spacer mask portion to define the gate structure, gate sidewall spacers, and epitaxial source and drain regions, reducing fin erosion and defect concentration by aligning all structures through a single patterning process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple etch steps and dummy gate removal are used in conventional finFET manufacturing, then the gate structure can be formed, but fin erosion and defect formation occur

Engineering Contradiction:
Improvegate structure formationVSAvoidfin erosion
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The method performs preliminary patterning actions by forming a mandrel structure and spacer mask before the actual gate formation. The mandrel is formed with precise dimensions, and the spacer mask is deposited conformally, establishing a self-aligned framework that guides subsequent gate formation without requiring additional etch steps that would cause fin erosion.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mandrel structure serves as an intermediary element that enables precise gate patterning. The mandrel is formed first, then the spacer mask is deposited on it, creating a self-aligned pattern transfer system. This intermediary framework allows the gate to be formed without direct lithographic patterning that would require multiple etch steps and cause fin erosion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If multiple etch steps are used to form gate and sidewall spacers, then the structures can be defined, but defect concentration increases in source and drain regions

Engineering Contradiction:
Improvestructure definitionVSAvoiddefect concentration
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The method merges the patterning of the gate and sidewall spacers into a single self-aligned process. The mandrel and spacer mask are formed together as an integrated pattern transfer system, and both the gate and sidewall spacers are defined in one etch step using this combined structure as the mask, eliminating multiple separate patterning operations that would increase defect concentration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The spacer mask acts as an intermediary that simultaneously defines both the gate pattern and the sidewall spacer pattern. By depositing the spacer mask conformally on the mandrel and using it as a single etch mask for both structures, the method ensures precise alignment and reduces the number of patterning steps, thereby lowering defect concentration in source and drain regions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If dummy gate removal is performed, then the gate structure can be finalized, but epitaxial nodule formation occurs

Engineering Contradiction:
Improvegate structure finalizationVSAvoidepitaxial nodule formation
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The method extracts the need for dummy gate removal entirely by using a mandrel-based self-aligned patterning approach. The mandrel serves the function of defining the gate pattern from the beginning, and the spacer mask ensures proper sidewall spacer formation, eliminating the requirement for a separate dummy gate structure that would need to be removed and cause epitaxial nodule formation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The mandrel structure is formed preliminarily with the correct final gate pattern dimensions, and the spacer mask is deposited conformally on it. This preliminary self-aligned framework establishes the exact positions of the gate and sidewall spacers from the start, eliminating the need for subsequent dummy gate removal operations that would generate epitaxial nodules.

Inventive Principle:
Principle #10Preliminary action

4Object-affected harmful factors

If single sidewall image transfer technique is used with sacrificial structure, then fin erosion is minimized, but process complexity increases

Engineering Contradiction:
Improvefin erosion minimizationVSAvoidprocess complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The mandrel structure serves as an intermediary that simplifies the overall process by enabling self-aligned patterning. Although the mandrel formation adds a step, it eliminates multiple subsequent etch steps and dummy gate removal operations, reducing the total number of process steps and minimizing fin erosion through precise single-step patterning.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes fin erosion, reduces defect formation in epitaxial merge regions, and prevents the formation of epitaxial nodules, enhancing the integration scheme for finFETs by self-aligning the gate structure, sidewall spacers, and source/drain regions.

Implementation Method 1

The dielectric layer is then etched using the sacrificial structure as an etch mask

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

The plurality of fin structures is etched selectively to the plurality of sacrificial structures to expose a sidewall portion of the plurality of fin structures

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 3

The dielectric layer is etched selective to the spacer mask portion. A remaining portion of the dielectric layer provides a gate sidewall spacer

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS9252243B2Gate structure integration scheme for fin field effect transistors
Publication Date: 2016.02.02 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US9252243B2 patent drawing
  • US9252243B2 patent drawing
  • US9252243B2 patent drawing

AI summary

In one embodiment, a semiconductor device is provided that includes a gate structure present on a channel portion of a fin structure. The gate structure includes a dielectric spacer contacting a sidewall of a gate dielectric and a gate conductor. Epitaxial source and drain regions are present on opposing sidewalls of the fin structure, wherein surfaces of the epitaxial source region and the epitaxial drain region that is in contact with the sidewalls of the fin structure are aligned with an outside surface of the dielectric spacer. In some embodiments, the dielectric spacer, the gate dielectric, and the gate conductor of the semiconductor device are formed using a single photoresist mask replacement gate sequence.