FinFET Gate Isolation via Dummy Gate Plugs
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Solution Overview
Problem
Current FinFET technologies face challenges in reducing the spacing between adjacent gate structures, which affects the area and efficiency of CMOS devices, particularly in forming isolation features between gate segments.
Innovation Solution
The method involves forming insulating dummy gate plugs between adjacent vertical fins using amorphous carbon, allowing for the reduction of fin and gate segment spacing by replacing portions of the dummy gates with active gates and dielectric layers, thereby creating a segmented gate structure with reduced isolation feature size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional FinFET structures are used with standard gate isolation methods, then gate structures can be formed, but the spacing between adjacent gate structures cannot be reduced sufficiently, increasing device area
Solution Approach 1:
The gate structure is segmented into multiple sections with isolation features between them. The method forms isolation features between gate segments by selectively removing dummy gate material and forming insulating regions, enabling the gate to be divided into functionally separate sections that can be independently controlled or isolated.
Solution Approach 2:
Dummy gate structures serve as intermediary elements during the fabrication process. These dummy gates are formed initially to define the gate region, then selectively removed in certain areas to create isolation features, and partially retained to form the final gate structure with built-in isolation.
2Area of stationary object
If spacing between gate structures is reduced to decrease device area, then more compact design is achieved, but isolation features between gate segments become difficult to form
Solution Approach 1:
The dummy gate structures are formed in advance during the fabrication process, establishing the gate region boundaries before the actual gate formation. This preliminary structure enables subsequent selective removal and isolation feature formation without requiring additional alignment steps or complex processing for closely spaced gates.
Solution Approach 2:
The dummy gate structures serve dual purposes: they define the gate region during fabrication and subsequently become part of the final gate structure after selective removal. This self-service approach eliminates the need for separate isolation structure formation processes, simplifying manufacturing even for reduced spacing configurations.
3Reliability
If dummy gates are made of conductor or semiconductor material, then they can serve as functional gates, but they cannot provide electrical isolation between adjacent gate structures
Solution Approach 1:
The dummy gate material exhibits different properties in different locations. In regions where electrical isolation is needed, the dummy gate material is selectively removed or transformed into insulating material. In regions where gate functionality is needed, the dummy gate structure is retained and converted to functional gate material, achieving both isolation and functionality through local differentiation.
Solution Approach 2:
Instead of making the entire dummy gate structure conductive or semiconductor-based to ensure functionality, the approach inverts the strategy by using the dummy gate as a structural template that is selectively removed or transformed in isolation regions, while being converted to functional material only where needed. This inversion allows the same initial structure to serve both isolation and functional purposes.
Data Source
AI summary
A method of forming a complementary metal oxide semiconductor (CMOS) device is provided. The method includes forming a plurality of vertical fins on a substrate, and forming at least two dummy gates across the plurality of vertical fins. The method further includes forming a masking block on one of the at least two dummy gates, and removing the portions of the at least two dummy gates not covered by the masking block, wherein the portion of the one dummy gate covered by the masking block forms a dummy gate plug. The method further includes forming a gate dielectric layer on the exposed surfaces of the plurality of vertical fins and dummy gate plug, and forming a conductive gate layer on the gate dielectric layer, wherein the dummy gate plug physically separates two active gate structures.