FinFET Replacement Gate Isolation to Prevent Voids and Pits
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Solution Overview
Problem
As semiconductor devices undergo miniaturization, the formation of voids and pits between isolation regions and metal gates becomes a challenge due to the reduction in feature sizes, affecting the integration density and reliability of FinFET devices.
Innovation Solution
A gate-last process is employed where a sacrificial oxide is formed on the sidewalls of dummy gates after forming the isolation region, increasing the gap fill distance between the isolation region and the metal gates, thereby reducing the formation of voids and pits during the replacement of dummy gates with metal gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but voids and pits form between isolation regions and metal gates affecting reliability
Solution Approach 1:
A sacrificial oxide layer is formed on the sidewalls of dummy gates before the metal gate filling process. This preliminary action creates a controlled interface that prevents void and pit formation during subsequent metal deposition, thereby maintaining reliability while enabling continued miniaturization for high integration density
Solution Approach 2:
The sacrificial oxide acts as an intermediary layer between the isolation region and the metal gate. This intermediate material facilitates proper metal filling by providing a suitable surface for metal deposition and preventing direct contact issues between the metal and isolation region, thus eliminating voids and pits
2Productivity
If feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but manufacturing precision deteriorates due to void and pit formation
Solution Approach 1:
The sacrificial oxide is deposited on dummy gate sidewalls before metal gate formation, creating a prepared surface that ensures uniform metal filling. This preliminary preparation prevents manufacturing defects and maintains precise metal deposition even as feature sizes decrease for higher integration density
Solution Approach 2:
The introduction of the sacrificial oxide layer changes the physical and chemical parameters of the gate interface, creating optimal conditions for metal filling. This parameter modification ensures consistent and precise metal deposition across scaled-down features, maintaining manufacturing precision while enabling higher integration density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density and reliability of FinFET devices by minimizing voids and pits, allowing for more precise metal filling and improved device performance.
Implementation Method 1
forming a sacrificial oxide on sidewalls of the dummy gate material in the recess
Data Source
AI summary
A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; forming a recess in the dummy gate material between the first fin and the second fin; forming a sacrificial oxide on sidewalls of the dummy gate material in the recess; filling an insulation material between the sacrificial oxide on the sidewalls of the dummy gate material in the recess; removing the dummy gate material and the sacrificial oxide; and forming a first replacement gate over the first fin and a second replacement gate over the second fin.


