FinFET Gate Oxide Plasma Nitridation for Etch Durability
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in achieving precise critical dimension control and defect-free fin formation in FinFETs, particularly in sub 10-15 nm technology nodes, where the quality of the silicon oxide gate dielectric layer is critical for high reliability and etching durability.
Innovation Solution
A novel process introduces nitrogen into the silicon oxide gate dielectric layer through plasma nitridation, controlling nitrogen concentration profiles to enhance electrical and physical properties, using specific gas flow ratios and plasma processes to improve etching resistance and reduce threshold voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate dielectric layer formation is used, then manufacturing process is simple, but etching durability is insufficient and fin top damage occurs
Solution Approach 1:
The patent applies preliminary action by performing plasma nitridation on the gate dielectric layer before the gate electrode formation step. This pre-treatment introduces nitrogen into the gate dielectric layer to enhance its etching durability and prevent fin top damage during subsequent processing steps, thereby resolving the contradiction between improving reliability and maintaining process simplicity.
Solution Approach 2:
The patent employs parameter changes by modifying the chemical composition of the gate dielectric layer through nitrogen incorporation via plasma nitridation. This changes the physical and chemical properties of the dielectric material, improving etching resistance and reducing fin top damage while maintaining the overall process flow.
2Reliability
If nitrogen concentration is increased in gate dielectric layer, then etching resistance improves, but threshold voltage control becomes difficult
Solution Approach 1:
The patent applies local quality by creating a nitrogen concentration gradient within the gate dielectric layer through controlled plasma nitridation. The nitrogen concentration is highest at the surface and decreases toward the bulk, providing enhanced etching resistance at the surface while maintaining better threshold voltage control in the bulk region, thus resolving the contradiction between etching resistance and threshold voltage control.
Solution Approach 2:
The patent uses partial action by performing plasma nitridation under controlled conditions that introduce a moderate amount of nitrogen into the gate dielectric layer. By optimizing process parameters such as plasma power, gas flow rate, and treatment time, the patent achieves sufficient etching resistance without excessive nitrogen incorporation that would adversely affect threshold voltage control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The plasma nitridation process improves the quality of the gate dielectric layer, enhancing etching durability and reducing fin top damage, thereby supporting reliable operation of FinFETs in advanced technology nodes.
Implementation Method 1
A novel process introduces nitrogen into the silicon oxide gate dielectric layer through plasma nitridation
Data Source
AI summary
In a method of manufacturing a semiconductor device, a fin structure is formed by patterning a semiconductor layer, an isolation insulating layer is formed such that an upper portion of the fin structure protrudes from the isolation insulating layer, a gate dielectric layer is formed by a deposition process, a nitridation operation is performed on the gate dielectric layer, and a gate electrode layer is formed over the gate dielectric layer. The gate dielectric layer as formed includes silicon oxide, and the nitridation operation comprises a plasma nitridation operation using a N2 gas and a NH3 gas.