FinFET Metal Gate Profile Control in Low-Density Regions
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Solution Overview
Problem
Existing technologies face challenges in achieving desired control over critical dimensions of the active gate in FinFET devices, particularly in low density areas, leading to decreased performance due to unfavorable gate profiles.
Innovation Solution
The method involves forming FinFET devices with specific profiles of active gates in both high and low density areas using distinct processes, including the use of dummy gate structures, gate fill materials, and etching operations to create advantageous gate profiles, allowing for improved control and performance in both high and low density regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional gate formation processes are used, then manufacturing simplicity is maintained, but gate profile control precision deteriorates in low density areas
Solution Approach 1:
The fabrication process is divided into distinct segments: forming dummy gate structures with specific tapering angles, selectively removing dummy gates in low density areas, and forming final active gates. This segmentation allows precise control of gate profiles in different device regions without requiring completely different process flows for each area.
Solution Approach 2:
Dummy gate structures are formed in advance with predetermined tapering characteristics before the final active gate formation. These preliminary dummy gates serve as templates that guide the subsequent gate formation process, ensuring that the final gates inherit the desired profile characteristics while allowing selective modification in low density areas.
2Manufacturing precision
If gate fill materials are used extensively, then gate profile precision is improved, but material loss increases
Solution Approach 1:
The process applies different treatments to dummy gates in different regions: dummy gates in high density areas are retained and used as final gates, while dummy gates in low density areas are selectively removed. This local differentiation minimizes material loss by avoiding unnecessary removal of gate fill materials from regions where they are needed.
Solution Approach 2:
Gate fill materials are selectively discarded only in low density areas where dummy gates are removed, while being recovered and retained in high density areas where they form the final active gates. This selective discarding approach optimizes material utilization by maintaining gate structures where they provide value.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of FinFET devices with optimized active gate profiles in both high and low density areas, enhancing performance and yield by addressing the issues of small critical dimensions and poor control in existing technologies.
Implementation Method 1
etching operations to create advantageous gate profiles
Data Source
AI summary
A semiconductor device may be formed by forming a first fin and a second fin in a first area and a second area of a substrate, respectively; which may be followed by forming of a first dummy gate structure and a second dummy gate structure straddling the first fin and second fin, respectively and forming a sacrificial layer extending along a bottom portion of the second dummy gate structure. The first dummy gate structure may be replaced with a first metal gate structure, while the second dummy gate structure and the sacrificial layer may be replaced with a second metal gate structure.