FinFET Gate Profile Shaping With Oblique Ion Beam Deposition

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Solution Overview

Problem

Existing semiconductor fabrication processes face challenges in achieving precise control over deposition and etching processes, particularly in forming desired device profiles for semiconductor devices like FinFETs, which require accurate patterning and structural integrity.

Innovation Solution

The method involves a directional deposition process using oblique angles of ion beams to form a protection layer selectively, followed by an etching process to remove protrusion portions of dummy gates, allowing for precise patterning and structural adjustments in semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition and etching processes are used, then basic device operation is achieved, but manufacturing precision and device profile accuracy deteriorate

Engineering Contradiction:
Improvedevice profile accuracyVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The fabrication process is divided into multiple sequential steps: forming dummy gates, performing directional deposition at oblique angles to create protection layers, selective etching of protrusion portions, and removal of dummy gates. This segmentation allows precise control over device profile formation while maintaining manageable process complexity through systematic breakdown of operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy gates are formed in advance before the actual gate structure is created. These preliminary structures serve as templates that guide the directional deposition process, enabling precise profile formation. The dummy gates are removed after serving their purpose, demonstrating preliminary action that facilitates subsequent precise manufacturing steps

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If oblique angle ion beam deposition is used, then manufacturing precision improves, but processing time increases

Engineering Contradiction:
Improvepattern precisionVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The directional deposition process applies ion beams at oblique angles to create protection layers with specific local properties on certain surfaces while leaving other areas unaffected. This local quality approach allows precise patterning by selectively modifying only the regions that require protection, reducing unnecessary processing time on already-correct areas

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The oblique angle deposition creates protection layers that extend slightly beyond the desired final pattern boundaries. This excessive action is intentional, as subsequent selective etching removes the protrusion portions to achieve the exact target dimensions. The partial protection approach ensures complete coverage of areas needing protection while allowing easy removal of excess material

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables more even ion distribution and uniform processing of semiconductor wafers, improving the precision and accuracy of device profile formation, which enhances device performance and yield.

Implementation Method 1

The deposition process includes, for example, ion beam deposition

Methodology Applied
Scientific EffectIon beam deposition: Physical Vapour Deposition

Implementation Method 2

These deposition and etching processes are basic process with regard to device operation

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20250089332A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.03.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250089332A1 patent drawing
  • US20250089332A1 patent drawing
  • US20250089332A1 patent drawing

AI summary

A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.