FinFET Gate Electrode Segmentation for Channel Control
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Solution Overview
Problem
Conventional FinFET devices have limited effective channel lengths and channel height extensions, restricting their performance, particularly in the demand for size reductions and current drive capabilities.
Innovation Solution
The manufacturing of FinFET devices with enlarged channel regions is achieved by forming gate electrodes parallel to semiconductor fins, where the gate electrodes have a lower height than the fins, allowing for increased channel lengths and stability, and using a gate first approach to simplify the process flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FinFET devices are used with standard gate electrode heights, then the manufacturing process is simpler, but the effective channel length and channel height extension are limited, restricting performance
Solution Approach 1:
The gate electrode structure is segmented into multiple portions with different heights. The gate electrode includes a first gate portion and a second gate portion, where the second gate portion extends further than the first gate portion. This segmentation allows different regions of the gate to control different channel regions independently, thereby increasing the effective channel length and height extension without requiring a complete redesign of the entire gate structure.
Solution Approach 2:
The gate electrode structure transitions from a conventional planar configuration to a three-dimensional multi-level structure. By extending the second gate portion beyond the first gate portion in the vertical dimension, the design achieves increased channel control in multiple spatial dimensions, effectively increasing the channel height extension and overall device performance.
2Reliability
If the channel length is increased to improve performance, then the short channel effect is reduced, but the device area increases
Solution Approach 1:
Instead of increasing channel length solely in the horizontal plane, the invention extends the gate control into the vertical dimension by creating a multi-level gate structure. The second gate portion extends further vertically than the first gate portion, effectively increasing the channel height extension. This allows the device to achieve better short channel effect control through vertical channel extension rather than horizontal lengthening, thereby maintaining compact device area.
Solution Approach 2:
The gate electrode structure employs a nested configuration where the second gate portion is positioned to extend beyond the first gate portion. This nested arrangement allows the longer channel control to be achieved within a compact footprint by utilizing vertical stacking and overlapping regions, effectively increasing the functional channel length without proportionally increasing the overall device area.
Data Source
AI summary
A method of manufacturing a semiconductor device includes providing a semiconductor layer, forming a plurality of semiconductor fins on a surface of the semiconductor layer extending in parallel to each other along a first direction parallel to the surface of the semiconductor layer, and forming a plurality of gate electrodes comprising longitudinal portions extending parallel to the semiconductor fins along the first direction.