FinFET Gate Spacer Structure for Epitaxy and Extrusion Control
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming reliable devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, which affects the formation of semiconductor devices with high functional density.
Innovation Solution
A method involving the formation of semiconductor fins with multiple spacer layers, where the second spacer layer is etched back to be below the fin top, mitigating metal gate extrusion and reducing device capacitance, and improving epitaxy growth by thinning the gate spacer, thereby enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to increase functional density, then production efficiency is improved and costs are lowered, but fabrication process difficulty increases and device reliability deteriorates
Solution Approach 1:
The gate spacer is divided into multiple segments (first gate spacer segment, second gate spacer segment, third gate spacer segment) with different heights and materials. This segmentation allows each segment to serve specific functions: the first segment provides structural support, the second segment (etched back) mitigates metal gate extrusion, and the third segment maintains proper spacing. This resolves the contradiction by enabling reliable device formation at small scales through differentiated functional zones within the spacer structure.
Solution Approach 2:
Different portions of the gate spacer are assigned different materials and geometries tailored to local requirements. The first segment uses a first material with specific etch resistance, the second segment uses a second material optimized for mitigating extrusion, and the third segment uses a third material for final spacing. This local differentiation allows the structure to simultaneously satisfy multiple competing requirements at different locations, maintaining reliability while enabling small feature sizes.
2Reliability
If gate spacer thickness is reduced to improve epitaxy growth, then device performance is improved, but metal gate extrusion increases
Solution Approach 1:
The gate spacer is segmented into three distinct portions with different heights and materials. The second gate spacer segment is etched back to a lower height than the first and third segments, creating a stepped configuration. This segmentation allows the second segment to be thinner for improved epitaxy growth while the first and third segments maintain greater thickness to prevent metal gate extrusion, thus resolving the contradiction between performance and extrusion control.
Solution Approach 2:
The gate spacer structure employs parameter changes by varying the height, material composition, and thickness of different segments. The second segment has reduced thickness and uses a material specifically selected to mitigate extrusion while allowing better epitaxial growth. This parameter differentiation enables the structure to simultaneously achieve thin profiles where needed and maintain structural integrity where required, resolving the extrusion-performance contradiction.
3Reliability
If multiple spacer layers with different materials are formed to control extrusion and improve epitaxy, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The gate spacer is formed as a stacked structure of three segments deposited in sequence using different materials. Each segment is deposited conformally over the previous segment, creating a layered architecture that can be formed using standard sequential deposition techniques. This segmentation approach, while introducing multiple materials, uses conventional process steps that manage manufacturing complexity while achieving the performance benefits of extrusion control and improved epitaxy.
Solution Approach 2:
The multi-material gate spacer structure serves multiple functions simultaneously: the first segment provides structural support and etch resistance, the second segment mitigates metal gate extrusion while enabling improved epitaxial growth, and the third segment maintains proper spacing. This multi-functionality is achieved through a unified deposition and etch process flow that handles all segments in a coordinated manner, managing manufacturing complexity while delivering comprehensive performance improvements.
Data Source
AI summary
A method includes forming a semiconductor fin over a substrate; forming isolation structures laterally surrounding the semiconductor fin; forming a gate structure over the semiconductor fin; forming a first spacer layer and a second spacer layer over the gate structure and the semiconductor fin; etching back the second spacer layer, such that a top surface of the second spacer layer is lower than a top surface of the first spacer layer; after etching back the second spacer layer, forming a third spacer layer over the first spacer layer and the second spacer layer; etching the first, second, and third spacer layers and the semiconductor fin to form recesses; and forming epitaxial source/drain structures in the recesses.