FinFET Gate Stack Contacts With High-Selectivity Sacrificial Layers
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Solution Overview
Problem
As semiconductor devices approach smaller feature sizes, challenges arise in integrating more components within a given area, including issues with etch selectivity and process complexity during the fabrication of gate stacks and contact formations, which affect integration density and yield.
Innovation Solution
The use of self-aligned contact materials and sacrificial layers with high etch selectivity, such as zirconium oxide, and optional helmet materials to enhance etch selectivity and reduce damage during etching processes, allowing for precise control of gate heights and aspect ratios, thereby improving integration density and process robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used for gate stack fabrication, then manufacturing simplicity is maintained, but etch selectivity deteriorates leading to process complexity and yield issues
Solution Approach 1:
A sacrificial layer comprising zirconium oxide is introduced as an intermediary material between the gate electrode and surrounding structures. This sacrificial layer provides high etch selectivity (greater than 12:1) that enables precise patterning of gate stacks without damaging adjacent components, thereby resolving the etch selectivity issue while maintaining process feasibility
Solution Approach 2:
The patent modifies material parameters by selecting zirconium oxide with specific etch selectivity characteristics (greater than 12:1 selectivity to gate spacers). This parameter change enables differentiated etching rates that allow selective removal of sacrificial material while preserving gate structures, improving reliability without excessive process complexity
2Productivity
If feature sizes are reduced to increase integration density, then integration density is improved, but manufacturing precision deteriorates due to etch residues and lateral damage
Solution Approach 1:
The zirconium oxide sacrificial layer acts as a protective intermediary that can be selectively removed after serving its patterning function. This enables precise definition of gate structures at reduced feature sizes while minimizing lateral damage and residues, thereby maintaining manufacturing precision despite smaller dimensions
Solution Approach 2:
The sacrificial layer is deposited and patterned before final gate structure completion. This preliminary action establishes precise boundaries and protects adjacent areas during subsequent etching steps, ensuring high manufacturing precision is achieved even as feature sizes are reduced to increase integration density
3Productivity
If gate heights are reduced to improve integration density, then integration density is improved, but etch process window deteriorates
Solution Approach 1:
The zirconium oxide sacrificial layer provides a controlled etching intermediary that enables precise gate height definition. By using this sacrificial material with known etch selectivity characteristics, the process window is maintained even for reduced gate heights, as the sacrificial layer can be selectively removed without affecting the gate structures themselves
Data Source
AI summary
A semiconductor device such as a fin field effect transistor and its method of manufacture are provided. In some embodiments gate spacers are formed over a semiconductor fin, and a first gate stack is formed over the fin. A first sacrificial material with a large selectivity to the gate spacers is formed over the gate stack, and a second sacrificial material with a large selectivity is formed over a source/drain contact plug. Etching processes are utilized to form openings through the first sacrificial material and through the second sacrificial material, and the openings are filled with a conductive material.