FinFET Gate Stack Etching With SiGe Bottom Residue Removal
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Solution Overview
Problem
The formation of un-etched residues at the base of high aspect ratio structures, such as FinFET gates, leads to defects and compromised electrical characteristics, as existing etching techniques struggle to achieve verticality without compromising sidewall profiles.
Innovation Solution
A method involving a multi-layer structure with a thin bottom layer of silicon germanium (Si1-xGex) that preferentially etches and oxidizes, allowing for enhanced removal of residues through halogen-based etching and plasma oxidation, followed by standard oxide removal mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If aggressive etching conditions are used to remove un-etched residues, then residue removal is improved, but sidewall profiles are compromised
Solution Approach 1:
The gate structure is segmented into two distinct layers: a first gate layer (silicon) and a second gate layer (silicon germanium). This segmentation allows each layer to serve different functions - the silicon layer provides the primary gate structure with vertical sidewalls, while the silicon germanium layer acts as a sacrificial bottom layer that preferentially etches to prevent residue formation without compromising the silicon sidewall profile.
Solution Approach 2:
The silicon germanium layer serves as an intermediary sacrificial layer between the silicon gate layer and the substrate. It mediates the etching process by being preferentially removed through halogen-based etching, allowing complete residue elimination while the silicon gate layer maintains its vertical sidewall profile unaffected by the aggressive etching conditions.
2Shape
If vertical gate sidewall profile is achieved, then sidewall verticality is improved, but gate residue remains at the base
Solution Approach 1:
Different materials are used at different locations within the gate structure - silicon for the upper gate layer requiring vertical sidewalls, and silicon germanium for the bottom layer requiring complete removal. This local quality differentiation allows the silicon portion to maintain verticality while the silicon germanium portion is selectively removed to eliminate residues at the gate base.
Solution Approach 2:
The material composition parameter is changed from pure silicon to silicon germanium at the bottom layer. This parameter change creates differential etching behavior - the silicon germanium layer has higher etch rate with halogen-based etchants, enabling complete removal without affecting the silicon gate layer's vertical sidewall profile.
3Device complexity
If standard etching techniques are used, then process simplicity is maintained, but un-etched residues form at the base
Solution Approach 1:
The gate structure uses composite materials - silicon and silicon germanium - with different etching characteristics. This composite structure enables standard halogen-based etching techniques to effectively remove the silicon germanium layer completely while leaving the silicon gate layer intact with vertical sidewalls, eliminating residues without requiring complex specialized etching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively limits residue formation at the base of FinFET gates, maintaining vertical sidewall profiles and improving the electrical characteristics of FinFETs by utilizing the differential etching and oxidation rates of Si1-xGex compared to silicon.
Implementation Method 1
plasma etching the upper gate layer and the bottom gate layer to form the gate pattern
Implementation Method 2
oxidizing residues of the gate structure with to form oxide compounds
Data Source
AI summary
Residue at the base of a feature in a substrate to be etched is limited so that improved profiles may be obtained when forming vertical, narrow pitch, high aspect ratio features, for example fin field effect transistor (FinFET) gates. A thin bottom layer of the feature is formed of a different material than the main layer of the feature. The bottom material may be comprised of a material that preferentially etches and/or preferentially oxidizes as compared to the main layer. The bottom layer may comprise silicon germanium. The preferential etching characteristics may provide a process in which un-etched residuals do not remain. Even if residuals remain, after etch of the feature, an oxidation process may be performed. Enhanced oxidation rates of the bottom material allow any remaining residual to be oxidized. Plasma oxidation may be used. The oxidized material may then be removed by utilizing standard oxide removal mechanisms.