FinFET Gate Stack Strain via Thermal Oxidation

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Solution Overview

Problem

Existing FinFET devices and fabrication methods have limitations in achieving optimal performance due to complexity and inefficiencies in processing and manufacturing, particularly in inducing sufficient strain for improved device performance.

Innovation Solution

A method for fabricating FinFET devices involves forming semiconductor strips, recessing them to create trenches, depositing semiconductor material layers, forming a gate stack, and using thermal oxidation to induce strain through volume expansion, resulting in a strained channel for enhanced performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing FinFET fabrication methods are used, then device manufacturing is achieved, but sufficient strain cannot be induced in the channel for optimal performance

Engineering Contradiction:
Improvedevice performanceVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the physical-chemical parameters of the semiconductor material by introducing germanium into the silicon crystal lattice. This compositional parameter change induces tensile strain in the channel region, improving carrier mobility and device performance without requiring complex additional processing steps

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality by creating a strained semiconductor layer with specific germanium concentration in the channel region, while maintaining different material compositions in other regions. The strained layer is localized where needed to induce strain, while other regions maintain their original properties

Inventive Principle:
Principle #3Local quality

2Productivity

If scaling down process is applied, then production efficiency increases and costs decrease, but processing complexity increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent performs preliminary action by forming the strained semiconductor layer during the epitaxial growth process before subsequent fabrication steps. This preliminary incorporation of strain-inducing material simplifies later processing by eliminating the need for separate strain introduction steps

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively induces sufficient strain in the channel, improving device performance by increasing tensile strain and achieving desired channel characteristics, thereby enhancing the functionality of FinFET devices.

Implementation Method 1

using thermal oxidation to induce strain through volume expansion

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 2

induce strain through volume expansion

Methodology Applied
Scientific EffectVolume expansion: Thermal Expansion

Data Source

PatentUS10622480B2Forming gate stacks of FinFETs through oxidation
Publication Date: 2020.04.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10622480B2 patent drawing
  • US10622480B2 patent drawing
  • US10622480B2 patent drawing

AI summary

An integrated circuit structure includes a semiconductor substrate, and isolation regions extending into the semiconductor substrate, wherein the isolation regions have opposite sidewalls facing each other. A fin structure includes a silicon fin higher than top surfaces of the isolation regions, a germanium-containing semiconductor region overlapped by the silicon fin, silicon oxide regions on opposite sides of the germanium-containing semiconductor region, and a germanium-containing semiconductor layer between and in contact with the silicon fin and one of the silicon oxide regions.