FinFET Gate Stack Tantalum Nitride Thickness Control
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher device density, performance, and reduced costs, particularly in the fabrication and design of FinFETs and other MOSFETs, where current technologies struggle to optimize gate stack configurations for varying threshold voltages and effective work functions.
Innovation Solution
The method involves forming FinFETs with varying tantalum nitride layer thicknesses to create different threshold voltages by adjusting the tantalum nitride layer amounts in the gate stacks, allowing for distinct effective work functions and threshold voltages across different FinFETs, achieved through a process of patterning and deposition of work function materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If FinFETs are manufactured with uniform gate stack configurations, then manufacturing process is simple, but device performance and threshold voltage variation is limited
Solution Approach 1:
The patent applies local quality by forming different tantalum nitride layer thicknesses in different regions of the gate stack. Specifically, a first tantalum nitride layer is deposited with a first thickness and a second tantalum nitride layer is deposited with a second thickness greater than the first thickness in different regions, enabling spatial variation of threshold voltages across the device while maintaining a systematic manufacturing approach.
2Adaptability or versatility
If multiple work function materials are deposited with different thicknesses, then different threshold voltages are achieved, but manufacturing process complexity increases
Solution Approach 1:
The patent segments the work function material deposition into multiple distinct layers. A first work function material is deposited and patterned to a first thickness, then a second work function material is deposited and patterned to a second thickness. This segmentation enables independent control of each layer's thickness and composition, facilitating precise threshold voltage adjustment while maintaining manufacturability through standardized deposition and patterning steps.
Solution Approach 2:
The patent utilizes parameter changes by varying the thickness of tantalum nitride layers and the composition of work function materials to achieve different effective work functions. By controlling the thickness parameters of deposited layers and selecting materials with different work function properties, the patent enables continuous adjustment of threshold voltages across FinFET devices without fundamentally changing the manufacturing process flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of FinFETs with tailored threshold voltages and effective work functions, enhancing device performance and density while maintaining cost-effectiveness by adjusting tantalum nitride layer thicknesses in the gate stacks.
Implementation Method 1
forming FinFETs with varying tantalum nitride layer thicknesses to create different threshold voltages by adjusting the tantalum nitride layer amounts in the gate stacks
Implementation Method 2
The transistor's gate wraps around the channel region of the fin. This configuration allows the gate to induce current flow in the channel from three sides.
Data Source
AI summary
A semiconductor device includes a first semiconductor channel, a second semiconductor channel, a first gate stack and a second gate stack. The first gate stack is present on the first semiconductor channel. The first gate stack includes a first work function layer and a first interposing layer present between the first semiconductor channel and the first work function layer. The second gate stack is present on the second semiconductor channel. The second gate stack includes a second work function layer and a second interposing layer present between the second semiconductor channel and the second work function layer. The first interposing layer and the second interposing layer are different at least in tantalum nitride amount.