FinFET Gate Structure with Step Recess for Density
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Solution Overview
Problem
Current FinFET devices have defects related to their insulating structure, which affects the density and performance of transistors, necessitating an improvement in the fabrication process to reduce the width of the insulating structure between transistors.
Innovation Solution
A method involving the formation of a cutting trench in the mandrel layer to expose the substrate, followed by the creation of a step structure with narrower recesses, allowing for a reduced width of the insulating structure and increased transistor density by forming spacers and etching processes to pattern the mandrel and substrate, ultimately filling the recesses with a gate and insulating structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a conventional FinFET fabrication process is used, then transistors can be formed with standard density, but the insulating structure width between transistors is too large, reducing device density
Solution Approach 1:
The patent segments the recess formation into two distinct stages: first forming a shallow first recess, then forming a deeper second recess within the first recess. This segmentation allows the insulating structure to be confined to a narrower region (the second recess) while still providing adequate isolation, thereby reducing the insulating structure width and increasing transistor density.
Solution Approach 2:
The patent introduces a vertical dimensionality change by creating a step structure where the second recess extends deeper than the first recess. This multi-level recess architecture allows the insulating structure to achieve its isolation function in a more compact horizontal footprint by utilizing vertical space, thus reducing the insulating structure width and improving transistor density.
2Quantity of substance
If the insulating structure width is reduced to increase transistor density, then device density improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by first forming the first recess and then forming spacers on its sidewalls before forming the second recess. These spacers serve as precision guides that define the boundaries of the second recess, ensuring high manufacturing precision for the narrow insulating structure width while allowing for relaxed process control during earlier stages.
Solution Approach 2:
The patent introduces spacers as intermediary structures that mediate between the first recess and the second recess. These spacers act as precise templates that transfer the pattern from the mandrel layer to the substrate, enabling high-precision formation of the narrow second recess and the insulating structure within it, thus achieving high transistor density with controlled manufacturing precision.
Data Source
AI summary
A semiconductor device includes a substrate, a first insulating structure and a gate structure. The substrate includes at least two fin structures protruding from a top surface of the substrate, the substrate includes a first recess and a second recess under the first recess, and the first recess and the second recess are disposed between the fin structures, in which a width of the first recess is larger than a width of the second recess, and the first recess and the second recess form a step structure. The first insulating structure fills the second recess. The gate structure is disposed on the first insulating structure, in which the first recess and the second recess are filled up with the gate structure and the first insulating structure.