FinFET Gate Structure with TiAl and TiN Work Function Metals
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Solution Overview
Problem
Conventional FinFET devices with high-k metal gates face challenges in simultaneously fabricating NMOS and PMOS devices with satisfactory performance, particularly due to differences in required work functions and oxygen concentration affecting the quality of work function metal layers.
Innovation Solution
The simultaneous formation of PMOS and NMOS FinFET devices with metal gate structures, where the NMOS device incorporates a n-type work function metal layer with a TiAl alloy and the PMOS device uses a p-type work function metal layer of titanium nitride, both with controlled oxygen concentrations to optimize work function properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional FinFET devices with high-k metal gates are used, then device density and performance are improved, but the fabrication process becomes overly complex when simultaneously manufacturing NMOS and PMOS devices
Solution Approach 1:
The patent applies local quality by implementing different work function metal layers in different regions of the gate structure. Specifically, a first work function metal layer (e.g., TiN) is formed for PMOS devices while a second work function metal layer (e.g., TiAlN or Ta) is formed for NMOS devices. This allows each region to have the specific work function properties needed for its device type, enabling simultaneous fabrication of both NMOS and PMOS FinFET devices with optimized performance without requiring separate fabrication processes.
2Ease of manufacture
If work function metal layers are formed without controlled oxygen concentration, then fabrication is simpler, but the quality and performance of the metal gate structures deteriorate
Solution Approach 1:
The patent applies parameter changes by precisely controlling the oxygen concentration in the work function metal layers during formation. The method specifies forming the first work function metal layer with an oxygen concentration within a particular range (e.g., 1-20 at%) and the second work function metal layer with oxygen concentration controlled similarly or differently depending on device requirements. This parameter control ensures optimal work function properties and interface quality while maintaining a unified fabrication process that doesn't significantly increase manufacturing complexity.
Data Source
AI summary
A semiconductor device includes a n-type gate structure over a first semiconductor fin, in which the n-type gate structure includes a n-type work function metal layer overlying the first high-k dielectric layer. The n-type work function metal layer includes a TiAl (titanium aluminum) alloy, in which an atom ratio of Ti (titanium) to Al (aluminum) is in a range substantially from 1 to 3. The semiconductor device further includes a p-type gate structure over a second semiconductor fin, in which the p-type gate structure includes a p-type work function metal layer overlying the second high-k dielectric layer. The p-type work function metal layer includes titanium nitride (TiN), in which an atom ratio of Ti to N (nitrogen) is in a range substantially from 1:0.9 to 1:1.1.


