FinFET Metal Gate Trench Structure for Leakage-Controlled Etching
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Solution Overview
Problem
In the semiconductor industry, advanced processing nodes face challenges with metal gate leakage due to the close pitch between adjacent metal gates, which affects the reliability of non-planar transistor devices like FinFETs, and existing etching processes can damage the metal gate structures, leading to precision and reliability issues.
Innovation Solution
A method is developed to form metal gates with a glue layer comprising multiple sub-layers, where the second sub-layer selectively removes the first sub-layer from the upper trench while leaving it intact in the lower trench, preventing over-etching and damage, and a precise gate electrode is formed with controlled height and sidewall profiles, using wet etch processes to maintain the integrity of the gate dielectric and work function layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wet etch processes are used to form metal gates, then manufacturing precision is improved, but metal gate leakage occurs due to close pitch between adjacent metal gates
Solution Approach 1:
The gate trench is divided into an upper trench and a lower trench with different widths, allowing selective etching and deposition processes to address different regions with different requirements for pitch control and leakage prevention
Solution Approach 2:
Different regions of the gate structure are assigned different functions: the upper trench region handles pitch control while the lower trench region focuses on leakage prevention, with selective material deposition in each region
2Ease of manufacture
If existing etching processes are used, then manufacturing simplicity is maintained, but damage to metal gate structures occurs leading to precision issues
Solution Approach 1:
A glue layer comprising multiple sub-layers is introduced as an intermediary between the gate dielectric layer and the metal gate structure, serving as a protective buffer during etching processes to prevent damage to the metal gate while maintaining process simplicity
Solution Approach 2:
The multi-sublayer glue layer is formed beforehand to provide protective cushioning during subsequent etching operations, preventing direct contact between etchants and the metal gate structure that would cause damage
3Productivity
If metal gates are formed with close pitch to increase integration density, then productivity is improved, but metal gate leakage increases affecting reliability
Solution Approach 1:
The gate trench geometry transitions from a simple planar structure to a multi-level structure with upper and lower trenches of different widths, adding vertical and lateral dimensional control to manage both pitch and leakage simultaneously
Solution Approach 2:
The width parameter of the gate trench is varied at different vertical levels, with the upper trench having a different width than the lower trench, allowing optimization of both pitch and leakage characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces metal gate leakage, limits damage to the metal gate, and maintains precise critical dimensions and sidewall profiles, enhancing the reliability and performance of non-planar transistors by controlling the height and structure of the metal gate effectively.
Implementation Method 1
The wet etching solution selectively removes the second portion of the gate dielectric layer exposed by the removing of the second sub-layer of the glue layer, while remaining the metal gate substantially intact
Implementation Method 2
A gate structure, configured to control the flow of charge carriers within a conductive channel of the FinFET device, wraps around the fin
Data Source
AI summary
A method for manufacturing a semiconductor device includes forming a gate trench over a semiconductor fin, the gate trench including an upper portion and a lower portion. The method includes sequentially forming one or more work function layers, a capping layer, and a glue layer over the gate trench. The glue layer includes a first sub-layer and a second sub-layer that have respective different etching rates with respect to an etching solution. The method includes removing the second sub-layer while leaving a first portion of the first sub-layer filled in the lower portion of the gate trench.