FinFET Dummy Gate Grain Control for Low-Roughness Metal Gates
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Solution Overview
Problem
Existing FinFET devices face challenges in forming a three-dimensional strained channel, particularly due to the presence of coalescence boundaries or seams in the dummy gate, which affect the quality of the metal gate and increase with decreasing technology nodes, necessitating improvements in dummy gate design and processing.
Innovation Solution
A method for manufacturing FinFET structures involves forming a dummy gate with a reduced density of coalescence boundaries by using a formation-removal cycle and thermal treatments to achieve equiaxed grains with a homogeneous, uniform distribution, reducing grain size mismatch and improving the quality of the metal gate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dummy gate is formed using conventional methods, then the metal gate can be formed, but the density of coalescence boundaries increases and grain size mismatch occurs, degrading metal gate quality
Solution Approach 1:
The patent applies preliminary action by performing a formation-removal cycle on the dummy gate before final metal gate formation. This involves forming a preliminary dummy gate structure, selectively removing portions, and replacing with refined material to eliminate coalescence boundaries and achieve uniform grain size distribution before the critical metal gate deposition step.
Solution Approach 2:
The patent employs parameter changes by modifying the physical and chemical parameters of the dummy gate material through thermal treatments and selective removal processes. The grain size is controlled to be uniform, and the material undergoes phase changes during the formation-removal cycle to achieve the desired microstructure with minimized coalescence boundaries.
2Productivity
If technology nodes are decreased to increase functional density, then production efficiency improves and costs降低, but coalescence boundaries in the dummy gate become more problematic
Solution Approach 1:
The formation-removal cycle is performed as a preliminary step before metal gate formation to pre-condition the dummy gate structure. This preliminary action ensures that even at scaled dimensions, the dummy gate has the required grain uniformity and minimal coalescence boundaries, enabling continued scaling without quality degradation.
Solution Approach 2:
The dummy gate formation process is segmented into multiple stages: initial dummy gate formation, selective removal of coalescence-prone regions, and replacement with refined material. This segmentation allows independent optimization of each step to achieve overall grain uniformity despite the constraints of smaller technology nodes.
3Ease of manufacture
If conventional dummy gate formation is used, then the process is simple, but line edge roughness increases and device performance deteriorates
Solution Approach 1:
The preliminary formation-removal cycle prepares the dummy gate structure with uniform grains and minimal defects before the critical metal gate deposition. This preliminary conditioning of the substrate surface and dummy gate interface reduces line edge roughness during subsequent processing steps, improving final device performance.
Solution Approach 2:
The patent changes material parameters and processing conditions during the formation-removal cycle to achieve a dummy gate structure with optimized surface properties. The thermal treatments and selective removal processes modify the material parameters to reduce surface irregularities and line edge roughness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a high-quality metal gate with reduced line edge roughness and improved performance by minimizing the density of coalescence boundaries and achieving a monomodal grain size distribution in the dummy gate, enhancing the overall FinFET device performance.
Implementation Method 1
changing the phase of the first or second silicon-containing material to micro-polycrystalline
Implementation Method 2
performing a first thermal treatment to the first and second portions of the trench dummy
Implementation Method 3
performing a first thermal treatment to the first and second portions of the trench dummy
Implementation Method 4
achieve equiaxed grains with a homogeneous, uniform distribution
Data Source
AI summary
A semiconductor structure, a method for manufacturing a FinFET structure and a method for manufacturing a semiconductor structure are provided. The method for forming a FinFET structure includes: providing a FinFET precursor including a plurality of fins and a plurality of gate trenches between the fins; forming a first portion of the trench dummy of a dummy gate within the plurality of gate trenches; removing at least a part of the first portion of the trench dummy; forming a second portion of the trench dummy over the first portion of the trench dummy; performing a first thermal treatment to the first and second portions of the trench dummy; and forming a blanket dummy of the dummy gate over the second portion of the trench dummy. The present disclosure further provides a FinFET structure with an improved metal gate.