FinFET Heterojunction Gate Control and Leakage Reduction
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Solution Overview
Problem
FinFET transistors with different crystalline materials in the fin and fin support face challenges with reduced gate control voltage, leading to leakage and decreased current due to limited electric field penetration, which is exacerbated by mechanical instability and line edge roughness in narrow fins.
Innovation Solution
The implementation of a heterojunction between crystalline semiconductor materials in the fin and fin support, with a gate dielectric that fits both surfaces, and the use of shallow trench isolation oxide to electrically isolate the fin support, enhancing gate control and current density by confining electrons and holes without a dielectric between the fin and support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a narrow fin is used to improve gate control, then gate control voltage is improved, but mechanical instability and line edge roughness increase causing yield loss
Solution Approach 1:
The patent uses a heterojunction structure where the fin is made of a first crystalline semiconductor material (e.g., SiGe) and the fin support is made of a second crystalline semiconductor material (e.g., Si). This composite material approach allows the fin to be narrower for better gate control while the fin support provides mechanical stability, resolving the contradiction between improved gate control and mechanical stability.
2Manufacturing precision
If different crystalline materials are used in fin and fin support to improve gate control, then gate control voltage is improved, but lattice constant and bandgap compatibility issues arise
Solution Approach 1:
The patent carefully selects crystalline semiconductor materials with specific lattice constants and bandgaps that are compatible with each other. The first crystalline semiconductor material in the fin and the second crystalline semiconductor material in the fin support are chosen to have matching lattice constants to minimize dislocation, while maintaining different bandgaps to achieve the desired heterojunction effects for improved gate control.
3Power
If the gate electric field is extended deeper into the fin to improve current control, then on-state current is improved, but leakage through the middle of the fin increases in off-state
Solution Approach 1:
The patent creates a heterojunction where the band structure varies locally within the fin. The first crystalline semiconductor material in the fin channel and the second crystalline semiconductor material in the fin support create different bandgaps, which locally modify the electric field distribution. This allows deeper penetration of the gate electric field to improve on-state current while the heterojunction structure prevents excessive leakage in off-state by creating potential barriers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves gate control voltage and current density in FinFET transistors, particularly at the heterojunction, reducing leakage and increasing on-state current, while maintaining mechanical stability and yield.
Implementation Method 1
The first crystalline semiconductor material of the first fin and the second crystalline semiconductor material of the first fin support form a first heterojunction in between
Implementation Method 2
the electric field generated by the gate control voltage can be limited in depth and may not extend sufficiently into the cross-sectional middle of the fin
Implementation Method 3
the use of shallow trench isolation oxide to electrically isolate the fin support
Data Source
AI summary
Roughly described, a computer program product describes a transistor with a fin, a fin support, a gate, and a gate dielectric. The fin includes a first crystalline semiconductor material which includes a channel region of the transistor between a source region of the first transistor and a drain region of the transistor. The fin is on a fin support. The fin support includes a second crystalline semiconductor material different from the first crystalline semiconductor material. The first crystalline semiconductor material of the fin and the second crystalline semiconductor material of the fin support form a first heterojunction in between. A gate, gate dielectric, and/or isolation dielectric can be positioned to improve control within the channel.